A Methodology for Modeling the Manufacturability of Integrated Circuits

Eric D. Boskin

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M95/26
April 1995

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/ERL-95-26.pdf

Advisor: Costas J. Spanos


BibTeX citation:

@phdthesis{Boskin:M95/26,
    Author = {Boskin, Eric D.},
    Title = {A Methodology for Modeling the Manufacturability of Integrated Circuits},
    School = {EECS Department, University of California, Berkeley},
    Year = {1995},
    Month = {Apr},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2752.html},
    Number = {UCB/ERL M95/26}
}

EndNote citation:

%0 Thesis
%A Boskin, Eric D.
%T A Methodology for Modeling the Manufacturability of Integrated Circuits
%I EECS Department, University of California, Berkeley
%D 1995
%@ UCB/ERL M95/26
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2752.html
%F Boskin:M95/26