Hao-Yen Tang

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2014-203

December 1, 2014

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-203.pdf

This report describes a level shifter with crowbar current suppression is proposed to achieve simultaneously high switching speed and low power dissipation for high-voltage transducer driving. Unlike prior implementations, the new circuit does not require additional high-voltage supplies nor static power consumption. The prototype switches up to 32V with only 1.8V input consuming less than 0.5 pJ/V2 per transition. Delays as low as 16 ns and 8.2 ns for falling and rising transitions respectively with 1.8V input are ideal for time-critical phased array beamforming applications and could be further reduced to 2.6 ns and 4.7 ns when driven with 3.3V supply. Together with buffer circuitry, the circuit is able to handle loads up to 100 pF efficiently with frequency above 10 MHz, which makes the circuit favorable for high voltage transducers application such as ultrasonic imaging.

Advisors: Bernhard Boser

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BibTeX citation:

@mastersthesis{Tang:EECS-2014-203,
    Author= {Tang, Hao-Yen},
    Title= {High Voltage Level-Shifter Circuit Design for Efficiently High Voltage Transducer Driving},
    School= {EECS Department, University of California, Berkeley},
    Year= {2014},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-203.html},
    Number= {UCB/EECS-2014-203},
    Abstract= {This report describes a level shifter with crowbar
current suppression is proposed to achieve simultaneously
high switching speed and low power dissipation for high-voltage
transducer driving. Unlike prior implementations, the new circuit
does not require additional high-voltage supplies nor static power
consumption. The prototype switches up to 32V with only
1.8V input consuming less than 0.5 pJ/V2 per transition. Delays
as low as 16 ns and 8.2 ns for falling and rising transitions
respectively with 1.8V input are ideal for time-critical phased
array beamforming applications and could be further reduced
to 2.6 ns and 4.7 ns when driven with 3.3V supply. Together
with buffer circuitry, the circuit is able to handle loads up to
100 pF efficiently with frequency above 10 MHz, which makes
the circuit favorable for high voltage transducers application such
as ultrasonic imaging.},
}

EndNote citation:

%0 Thesis
%A Tang, Hao-Yen 
%T High Voltage Level-Shifter Circuit Design for Efficiently High Voltage Transducer Driving
%I EECS Department, University of California, Berkeley
%D 2014
%8 December 1
%@ UCB/EECS-2014-203
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-203.html
%F Tang:EECS-2014-203