Designing High Speed Current Steering Digital to Analog Converter Using Berkeley Analog Generator

Mohammadamin Torabi

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2019-64

May 17, 2019

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS-2019-64.pdf

In this work, a high speed current steering Nyquist Digital to Analog Converter (DAC) is designed and developed in 16nm TSMC technology, as part of the data converter module of the Massive MIMO project. In this work, the focus is to write a layout generator using the Berkeley Analog Generator (BAG) so the design process can be captured, parameterized, and reused for future uses. This requires developing a systematic approach to data converter design: the required transistor parameters, as well as the layout process parameters can be calculated and implemented by the generator as a function of the required spec. This particular application requires an 8 bit DAC with ENOB (e ective number of bits) of 6 bits working at the Nyquist rate. With a sampling rate of 5GHz and large bandwidth linearity requirements of this application, this poses various challenges for the designer.

Advisors: Kristofer Pister

BibTeX citation:

@mastersthesis{Torabi:EECS-2019-64,
    Author= {Torabi, Mohammadamin},
    Title= {Designing High Speed Current Steering Digital to Analog Converter Using Berkeley Analog Generator},
    School= {EECS Department, University of California, Berkeley},
    Year= {2019},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS-2019-64.html},
    Number= {UCB/EECS-2019-64},
    Abstract= {In this work, a high speed current steering Nyquist Digital to Analog Converter (DAC) is
designed and developed in 16nm TSMC technology, as part of the data converter module of
the Massive MIMO project. In this work, the focus is to write a layout generator using the
Berkeley Analog Generator (BAG) so the design process can be captured, parameterized,
and reused for future uses. This requires developing a systematic approach to data converter
design: the required transistor parameters, as well as the layout process parameters can
be calculated and implemented by the generator as a function of the required spec. This
particular application requires an 8 bit DAC with ENOB (eective number of bits) of 6 bits
working at the Nyquist rate. With a sampling rate of 5GHz and large bandwidth linearity
requirements of this application, this poses various challenges for the designer.},
}

EndNote citation:

%0 Thesis
%A Torabi, Mohammadamin 
%T Designing High Speed Current Steering Digital to Analog Converter Using Berkeley Analog Generator
%I EECS Department, University of California, Berkeley
%D 2019
%8 May 17
%@ UCB/EECS-2019-64
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS-2019-64.html
%F Torabi:EECS-2019-64