RF-FPGA

Ali Niknejad

Defense Advanced Research Projects Agency

In direct-conversion transceiver, we typically offset the VCO center frequency from the LO frequency by a fraction ratio to avoid pulling, and then use LO generation circuit to translate it back. To realize the fraction ratio, we usually incorporate single-sideband mixing or multi-phase selection circuits. However, due to the finite matching in high frequency, it would generate considerable spur and require an inductive load for filtering, which not only consumes large silicon area but also pose a stringent trade-off between spur rejection and frequency coverage. To mitigate this issue, we propose a spur-filtering technique that is able to reject the spurs and also track with LO for wide range of coverage. We plan to verify the functionality of these techniques with CMOS prototypes in the 65nm and 14nm nodes.