S.S. Bhattacharyya, J.T. Buck, S. Ha and Edward A. Lee
EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M93/31
March 1993
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/ERL-93-31.pdf
BibTeX citation:
@techreport{Bhattacharyya:M93/31, Author = {Bhattacharyya, S.S. and Buck, J.T. and Ha, S. and Lee, Edward A.}, Title = {A Compiler Scheduling Framework for Minimizing Memory Requirements of Multirate DSP Systems Represented as Dataflow Graphs}, Institution = {EECS Department, University of California, Berkeley}, Year = {1993}, Month = {Mar}, URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/2329.html}, Number = {UCB/ERL M93/31} }
EndNote citation:
%0 Report %A Bhattacharyya, S.S. %A Buck, J.T. %A Ha, S. %A Lee, Edward A. %T A Compiler Scheduling Framework for Minimizing Memory Requirements of Multirate DSP Systems Represented as Dataflow Graphs %I EECS Department, University of California, Berkeley %D 1993 %@ UCB/ERL M93/31 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/2329.html %F Bhattacharyya:M93/31