S.P. Khatri and Robert K. Brayton and Alberto L. Sangiovanni-Vincentelli

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M99/50

, 1999

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/ERL-99-50.pdf

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BibTeX citation:

@techreport{Khatri:M99/50,
    Author= {Khatri, S.P. and Brayton, Robert K. and Sangiovanni-Vincentelli, Alberto L.},
    Title= {A VLSI Design Methodology Using a Network of PLAs Embedded in a Regular Layout Fabric},
    Year= {1999},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/3747.html},
    Number= {UCB/ERL M99/50},
}

EndNote citation:

%0 Report
%A Khatri, S.P. 
%A Brayton, Robert K. 
%A Sangiovanni-Vincentelli, Alberto L. 
%T A VLSI Design Methodology Using a Network of PLAs Embedded in a Regular Layout Fabric
%I EECS Department, University of California, Berkeley
%D 1999
%@ UCB/ERL M99/50
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/3747.html
%F Khatri:M99/50