Alessandro Pinto and Alberto L. Sangiovanni-Vincentelli and Luca Carloni

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2007-130

November 4, 2007

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-130.pdf

An SoC is modeled as a set of pre-designed cores characterized by their area and interfaces and a set of end-to-end communication requirements on the channels connecting them. These requirements are the input specification to a synthesis process that produces an on-chip communication (OCC) by assembling components such as interfaces, routers, buses and links, from a target library. Models for functionality, cost, and performance of each element are captured in the library together with their composition rules. Our contributions is two pronged: 1) A methodology for the design of OCC based on: -a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation; -the formulation of an optimization problem and a heuristic synthesis algorithms to solve it: given a set of communication requirements on the throughput and latency of the channels it returns a communication implementation that satisfies them while minimizing power consumption. 2) A publicly available software package that includes alternative synthesis algorithms, various communication libraries, supporting tools for simulation and visualization, and a collection of SoC benchmarks.

---

BibTeX citation:

@techreport{Pinto:EECS-2007-130,
    Author= {Pinto, Alessandro and Sangiovanni-Vincentelli, Alberto L. and Carloni, Luca},
    Title= {A Methodology and an Open Software Infrastructure for Constraint-Driven Synthesis of On-Chip Communications},
    Year= {2007},
    Month= {Nov},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-130.html},
    Number= {UCB/EECS-2007-130},
    Abstract= {An SoC is modeled as a set of pre-designed cores characterized by their area and interfaces and a set of end-to-end communication requirements on the channels connecting them.  These requirements are the input specification to a synthesis process that produces an on-chip communication (OCC) by assembling components such as interfaces, routers, buses and links, from a target library.  Models for functionality, cost, and performance of each element are captured in the library together with their composition rules.  Our contributions is two pronged:
1) A methodology for the design of OCC based on:
  -a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation;
  -the formulation of an optimization problem and a heuristic synthesis algorithms to solve it: given a set of communication requirements on the throughput and latency of the channels it returns a communication implementation that satisfies them while minimizing power consumption.
2) A publicly available software package that includes alternative synthesis algorithms, various communication libraries, supporting tools for simulation and visualization, and a collection of SoC benchmarks.},
}

EndNote citation:

%0 Report
%A Pinto, Alessandro 
%A Sangiovanni-Vincentelli, Alberto L. 
%A Carloni, Luca 
%T A Methodology and an Open Software Infrastructure for Constraint-Driven Synthesis of On-Chip Communications
%I EECS Department, University of California, Berkeley
%D 2007
%8 November 4
%@ UCB/EECS-2007-130
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2007/EECS-2007-130.html
%F Pinto:EECS-2007-130