The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor

Christopher Celio, David A. Patterson and Krste Asanović

EECS Department
University of California, Berkeley
Technical Report No. UCB/EECS-2015-167
June 13, 2015

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2015/EECS-2015-167.pdf

BOOM is a synthesizable, parameterized, superscalar out-of-order RISC-V core designed to serve as the prototypical baseline processor for future micro-architectural studies of out-of-order processors. Our goal is to provide a readable, open-source implementation for use in education, research, and industry.

BOOM is written in roughly 9,000 lines of the hardware construction language Chisel. We leveraged Berkeley’s open-source Rocket-chip SoC generator, allowing us to quickly bring up an entire multi-core processor system (including caches and uncore) by replacing the in-order Rocket core with an out-of-order BOOM core. BOOM supports atomics, IEEE 754-2008 floating-point, and page-based virtual memory. We have demonstrated BOOM running Linux, SPEC CINT2006, and CoreMark.


BibTeX citation:

@techreport{Celio:EECS-2015-167,
    Author = {Celio, Christopher and Patterson, David A. and Asanović, Krste},
    Title = {The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {2015},
    Month = {Jun},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2015/EECS-2015-167.html},
    Number = {UCB/EECS-2015-167},
    Abstract = {BOOM is a synthesizable, parameterized, superscalar out-of-order RISC-V core designed to serve as the prototypical baseline processor for future micro-architectural studies of out-of-order processors. Our goal is to provide a readable, open-source implementation for use in education, research, and industry.

BOOM is written in roughly 9,000 lines of the hardware construction language Chisel. We leveraged Berkeley’s open-source Rocket-chip SoC generator, allowing us to quickly bring up an entire multi-core processor system (including caches and uncore) by replacing the in-order Rocket core with an out-of-order BOOM core. BOOM supports atomics, IEEE 754-2008 floating-point, and page-based virtual memory. We have demonstrated BOOM running Linux, SPEC CINT2006, and CoreMark.}
}

EndNote citation:

%0 Report
%A Celio, Christopher
%A Patterson, David A.
%A Asanović, Krste
%T The Berkeley Out-of-Order Machine (BOOM): An Industry-Competitive, Synthesizable, Parameterized RISC-V Processor
%I EECS Department, University of California, Berkeley
%D 2015
%8 June 13
%@ UCB/EECS-2015-167
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2015/EECS-2015-167.html
%F Celio:EECS-2015-167