Department Notes:
Course objectives: This course gives students an understanding of digital system design techniques, including top-down design, FSM design, introductory computer design, and detailed timing issues, through lectures, labs, and a 7 week design project. Projects in recent years have included: wireless video game, electronic etch-a-sketch, network audio interface, real-time video analyzer, and streaming video receiver.
- Understand digital logic at the gate and switch level including both combinational and sequential logic elements.
- Understand clocking methodologies to manage information flow and preservation of circuit state.
- Appreciate digital logic specification methods and the compilation process that transforms these into logic networks.
- Gain experience with computer-aided design tools for implementation with programmable logic devices.
- Appreciate the advantages/disadvantages between hardware and software implementations of a function.
Topics covered:
- Combinational Logic, Canonical Logic Forms, K-maps
- Latches, Flip-flops, and Memory Cells
- Finite State Machines: Mealy vs. Moore
- Finite State Machine Design and Timing
- Verilog hardware description language
- FPGA Overview
- Case study: SDRAM timing and control
- System design: data path/controller partition
- Data path elements: asynchronous FIFO, register files, buses shifters
- Arithmetic Units: combinational and sequential multiplier
- Control unit design, including microprogramming
- Control parallelism, pipelining
- Case study: simple computer
- Clock Skew, Synchronizers, Asynchronous Communication
- Metastability, hazards
- FSM Optimization
- Fault Detection, Testing, Error Correction