Catalog Description: Instruction set architecture, microcoding, pipelining (simple and complex). Memory hierarchies and virtual memory. Processor parallelism: VLIW, vectors, multithreading. Multiprocessors.

Units: 4

Related Areas:

• Computer Architecture & Engineering (ARC)

Prerequisites: COMPSCI 61C

Formats:
Spring: 3.0 hours of lecture and 2.0 hours of discussion per week
Summer: 6.0 hours of lecture and 4.0 hours of discussion per week
Fall: 3.0 hours of lecture and 2.0 hours of discussion per week

Grading Basis: letter

Final Exam Status: Alternative method of final assessment

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Class Schedule (Spring 2026):
CS 152/252A – TuTh 17:00-18:29, Valley Life Sciences 2050 – Christopher Fletcher

Class Notes
- Seats reserved for students with enrollment permission are not open. They are reserved for students in internal programs. Please DO NOT ask faculty or staff for one of these seats. The students who qualify have already been notified.

Links:

• EECS Course Archives (CalNet authentication required)
• CS enrollment policies
• EE enrollment policies
• HKN course maps