Catalog Description: MIPS instruction set simulation. The assembly and linking process. Caches and virtual memory. Pipelined computer organization. Students with sufficient partial credit in 61C may, with consent of instructor, complete the credit in this self-paced course.

Units: 1

Prerequisites: Experience with assembly language including writing an interrupt handler, COMPSCI 9C, and consent of instructor.

Credit Restrictions: Students will receive no credit for COMPSCI 47C after completing COMPSCI 61C, or COMPSCI 61CL.

Formats:
Fall: 0.0 hours of self-paced per week
Spring: 0.0 hours of self-paced per week

Grading basis: letter

Final exam status: Written final exam conducted during the scheduled final exam period


Class Schedule (Fall 2024):
CS 47C –Dan Garcia, Peyrin Kao

Class Schedule (Spring 2025):
CS 47C –

Class homepage on inst.eecs


Department Notes:

Course objectives: CS47C brings students through a series of abstractions from high-level programming through machine architecture to logic design. The C programming language, MIPS assembly language, and schematic diagrams are used to introduce the abstractions. The course closely follows the Patterson and Hennessy textbook, supplemented by material on the C programming language and notes on the design of synchronous digital systems.

Topics Covered:

Course activities include programming assignments and quizzes; quizzes focus on low-level language details or programming techniques, while programming assignments are broader in scope. One of the programs is a substantial project comprising several hundred lines of code. The list of programming assignments appears below. The topics of assembly and linking are covered in a quiz. Programs are coded in the C programming language.