EECS 151LB. Introduction to Digital Design and Integrated Circuits Lab

Catalog Description: This lab covers the design of modern digital systems with Field-Programmable Gate Array (FPGA) platforms. A series of lab exercises provide the background and practice of digital design using a modern FPGA design tool flow. Digital synthesis, partitioning, placement, routing, and simulation tools for FPGAs are covered in detail. The labs exercises culminate with a large design project, e.g., an implementation of a full three-stage RISC-V processor system, with caches, graphics acceleration, and external peripheral components. The design is mapped and demonstrated on an FPGA hardware platform.

Units: 2.0

Prerequisites: Electrical Engineering 16A & 16B; Electrical Engineering 105 recommended and Computer Science 61C.

Formats:
Spring: 3.0 hours of laboratory per week

Grading basis: letter

Final exam status: No final exam


Class Schedule (Fall 2018):
Tu 8:00AM - 10:59AM, Cory 125 – Jan Rabaey
Th 5:00PM - 7:59PM, Cory 125 – Jan Rabaey

Class Schedule (Spring 2019):
Th 11:00AM - 1:59PM, Cory 125 –
We 2:00PM - 4:59PM, Cory 125 –

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