Catalog Description: This lab lays the foundation of modern digital design by first presenting the scripting and hardware description language base for specification of digital systems and interactions with tool flows. The labs are centered on a large design with the focus on rapid design space exploration. The lab exercises culminate with a project design, e.g. implementation of a 3-stage RISC-V processor with a register file and caches. The design is mapped to simulation and layout specification.

Units: 2

Also Offered As: EECS 251LA

Course Objectives: Software testing of digital designs is covered leading to a set of exercises that cover the design flow. Digital synthesis, floor-planning, placement and routing are covered, as well as tools to evaluate timing and power consumption. Chip-level assembly is covered, including instantiation of custom blocks: I/O pads, memories, PLLs, etc.

Student Learning Outcomes: Although the syllabus is the same as EECS151LA, the assignments and exams for EECS251LA will have harder problems in labs and in the project that test deeper understanding expected from a graduate level course.

Prerequisites: Electrical Engineering 16A & 16B; Computer Science 61C; and recommended: Electrical Engineering 105.

Formats:
Fall: 3.0 hours of laboratory per week

Grading Basis: Student Option

Final Exam Status: No

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Class Schedule (Spring 2026):
EECS 151LA-101/251LA-101 – Tu 14:00-16:59, Cory 140 – Borivoje Nikolic, Sagar Karandikar

Class Notes
*Unless taken in a previous term, enrollment in EECS
151/251A is REQUIRED along with lab. Please add yourself to the EECS 151/251LA waitlist. If you are out of compliance by instructor drop, you will be dropped.*

Phase 1 and 2 seats are open to EECS, CS, and non-EECS COE majors. Remaining seats open during the adjustment period.

Class Schedule (Fall 2026):
EECS 151LA/251LA-101 – Mo 08:00-10:59, Cory 140 – Borivoje Nikolic, Sagar Karandikar

Class Notes
***READ THIS CAREFULLY***

Priority enrollment goes to EECS/CS PhD and EECS MEng during Phase 1 and 2. Seats open to other majors with the excpetion of non-EECS MEng during the adjustment phase.

*Unless taken in a previous term, enrollment in EECS
151/251A is REQUIRED along with lab. Please add yourself to the EECS 151/251LA waitlist. If you are out of compliance by instructor drop, you will be dropped.*

EECS 151LA-2/251LA-102 – Fr 11:30-14:29, Cory 140 – Borivoje Nikolic, Sagar Karandikar

Class Notes
***READ THIS CAREFULLY***

Priority enrollment goes to EECS/CS PhD and EECS MEng during Phase 1 and 2. Seats open to other majors with the excpetion of non-EECS MEng during the adjustment phase.

*Unless taken in a previous term, enrollment in EECS
151/251A is REQUIRED along with lab. Please add yourself to the EECS 151/251LA waitlist. If you are out of compliance by instructor drop, you will be dropped.*

Links:

• EECS Course Archives (CalNet authentication required)
• CS enrollment policies
• EE enrollment policies
• HKN course maps