Catalog Description: CMOS devices and deep sub-micron manufacturing technology. CMOS inverters and complex gates. Modeling of interconnect wires. Optimization of designs with respect to a number of metrics: cost, reliability, performance, and power dissipation. Sequential circuits, timing considerations, and clocking approaches. Design of large system blocks, including arithmetic, interconnect, memories, and programmable logic arrays. Introduction to design methodologies, including laboratory experience.

Units: 4

Prerequisites: MAS-IC students only.

Credit Restrictions: Students will receive no credit for EE S241A after taking EE 141, EE W241A or EE 241A.

Formats:
Spring: 3.0 hours of web-based lecture and 4.0 hours of web-based discussion per week
Summer: 4.5 hours of web-based lecture and 6.0 hours of web-based discussion per week
Fall: 3.0 hours of web-based lecture and 4.0 hours of web-based discussion per week

Grading basis: letter

Final exam status: Written final exam conducted during the scheduled final exam period

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