Faculty Publications - A. Richard Newton

Books

  • R. A. Saleh, S. Jou, and A. R. Newton, Mixed-Mode Simulation and Analog Multilevel Simulation, Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture, and Digital Signal Processing, Boston: Kluwer Academic, 1994. [abstract]
  • R. A. Saleh, S. J. Jou, and A. R. Newton, Mixed-Mode Simulation and Analog Multilevel Simulation, The International Series in Engineering and Computer Science, Boston, MA: Kluwer Academic Publishers, 1994. [abstract]
  • T. J. Barnes, D. Harrison, A. R. Newton, and R. L. Spickelmier, Electronic CAD Frameworks, The Kluwer International Series in Engineering and Computer Science. VLSI, Computer Architecture, and Digital Signal Processing, Boston: Kluwer Academic Publishers, 1992. [abstract]
  • A. Ghosh, S. Devadas, and A. R. Newton, Sequential Logic Testing and Verification, The Kluwer International Series in Engineering and Computer Science; SECS 163, Boston: Kluwer Academic, 1992. [abstract]
  • P. Ashar, S. Devadas, and A. R. Newton, Sequential Logic Synthesis, The Kluwer International Series in Engineering and Computer Science, Boston: Kluwer Academic Publishers, 1992. [abstract]
  • T. J. Barnes, D. Harrison, A. R. Newton, and R. L. Spickelmier, Electronic CAD Frameworks, Kluwer International Series in Engineering and Computer Science, Boston, MA: Kluwer Academic Publishers, 1992. [abstract]
  • A. Ghosh, S. Devadas, and A. R. Newton, Sequential Logic Testing and Verification, Kluwer International Series in Engineering and Computer Science, Vol. 163, Boston, MA: Kluwer Academic Publishers, 1992. [abstract]
  • P. Ashar, S. Devadas, and A. R. Newton, Sequential Logic Synthesis, Kluwer International Series in Engineering and Computer Science, Boston, MA: Kluwer Academic Publishers, 1992. [abstract]
  • R. A. Saleh and A. R. Newton, Mixed-Mode Simulation, The Kluwer International Series in Engineering and Computer Science; SECS 89. VLSI, Computer Architecture, and Digital Signal Processing, Boston: Kluwer Academic Publishers, 1990. [abstract]
  • R. A. Saleh and A. R. Newton, Mixed-Mode Simulation, Kluwer International Series in Engineering and Computer Science, Vol. 89, Boston: Kluwer Academic Publishers, 1990. [abstract]
  • A. R. Newton, Ed., Selected Papers on Logic Synthesis for Integrated Circuit Design, Advances in Circuits and Systems, New York: IEEE Press, 1987. [abstract]

Book chapters or sections

  • J. S. Young, J. MacDonald, M. Shilman, A. Tabbara, P. N. Hilfinger, and A. R. Newton, "The JavaTime approach to mixed hardware-software system design," in System-Level Synthesis, A. A. Jerraya and J. Mermet, Eds., NATO Science Series E: Applied Sciences, Vol. 357, Boston, MA: Kluwer Academic Publishers, 1999, pp. 359-396.
  • B. Lin and A. R. Newton, "Exact redundant state registers removal based on binary decision diagrams," in VLSI '91: Proc. IFIP TC10/WG 10.5 Intl. Conf. on Very Large Scale Integration, A. Halaas and P. B. Denyer, Eds., IFIP Transactions A: Computer Science and Technology, Vol. A-1, The Netherlands: North-Holland, 1992, pp. 277-286.
  • A. R. Newton, "Has CAD for VLSI reached a dead end?," in VLSI '91: Proc. IFIP TC10/WG 10.5 Intl. Conf. on Very Large Scale Integration, A. Halaas and P. B. Denyer, Eds., IFIP Transactions A: Computer Science and Technology, Vol. A-1, Amsterdam, Netherlands: North-Holland, 1992, pp. 187-192.
  • B. Lin, G. S. Whitcomb, and A. R. Newton, "Symbolic don't cares and equivalence in high-level synthesis," in Logic and Architecture Synthesis: Proc. 1990 IFIP TC10/WG10.5 Workshop on Logic and Architecture Synthesis, P. Michel and G. Saucier, Eds., Amsterdam, Netherlands: North-Holland, 1991, pp. 19-27.
  • A. R. Newton, "VLSI-based system design challenges in the early 1990s," in Advanced Information Processing: Proc. Joint Symp. on Information Processing and Software Systems Design Automation, H. Schwartzel and I. A. Mizin, Eds., Berlin, Germany: Springer-Verlag, 1990, pp. 267-278.
  • S. Devadas, H. K. T. Ma, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "The relationship between logic synthesis and test," in Very Large Scale Integration: Proc. IFIP TC10/WG10.5 Intl. Conf. on Very Large Scale Integration (VLSI '89), G. Musgrave and U. Lauther, Eds., Amsterdam, Netherlands: North-Holland, 1990, pp. 175-186.
  • B. Lin and A. R. Newton, "Synthesis of multiple level logic from symbolic high-level description languages," in Very Large Scale Integration: Proc. IFIP TC10/WG10.5 Intl. Conf. on Very Large Scale Integration (VLSI '89), G. Musgrave and U. Lauther, Eds., Amsterdam, Netherlands: North-Holland, 1990, pp. 187-196.
  • A. R. Newton, "Symbolic layout and procedural design," in Design Systems for VLSI Circuits: Logic Synthesis and Silicon Compilation, G. De Micheli, A. L. Sangiovanni-Vincentelli, and P. Antognetti, Eds., NATO Advanced Study Institute. Series E: Applied Sciences, Vol. 136, Dordrecht, Netherlands: Martinus Nijhoff Publishers, 1987, pp. 65-112.
  • A. R. Newton, "Invited Paper: Techniques for logic synthesis," in VLSI Design of Digital Systems: Proc. IFIT TC10/WG10.5 Intl. Conf. on Very Large Scale Integration, E. Horbst, Ed., Amsterdam, Netherlands: North-Holland, 1986, pp. 27-42.
  • G. De Micheli, M. Hofmann, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "A design system for PLA-based digital circuits," in Advances in Computer-Aided Engineering Design, A. L. Sangiovanni-Vincentelli, Ed., Vol. 1, Greenwich, CT: JAI Press, 1985, pp. 285-264.
  • C. H. Séquin and A. R. Newton, "Appendix: Description of STIF 1.0," in Design Methodologies for VLSI Circuits, P. G. Jespers, C. H. Séquin, and F. van de Wiele, Eds., NATO Advanced Study Institute. Series E: Applied Sciences, Vol. 47, Alpen aan den Rijn, Netherland: Sijthoff & Noordhoff, 1982, pp. 147-171.
  • A. R. Newton, "Timing, logic and mixed-mode simulation for large MOS integrated circuits," in Computer Design Aids for VLSI Circuits, P. Antognetti, D. O. Pederson, and H. De Man, Eds., NATO Science Series E: Applied Sciences, Dordrecht, Netherlands: Martinus Nijhoff Publishers, 1981, pp. 175-239.

Articles in journals or magazines

Articles in conference proceedings

  • Z. Wei, D. Chai, A. Kuehlmann, and A. R. Newton, "Fast Boolean matching with don't cares," in Proc. 2006 7th Intl. Symp. on Quality Electronic Design (ISQED '06), Los Alamitos, CA: IEEE Computer Society Press, 2006, pp. 6 pp..
  • A. R. Newton, "Keynote Address #1: Great works for the 21st century: A critical role for the modern research university," in Proc. 4th ACM Intl. Conf. on Embedded Software (EMSOFT 2004), G. C. Buttazzo, Ed., New York, NY: ACM, Inc., 2004, pp. 1-1.
  • Z. Wei, Y. Cao, and A. R. Newton, "Digital image restoration by exposure-splitting and registration," in Proc. 17th Intl. Conf. on Pattern Recognition (ICPR 2004), Vol. 4, Los Alamitos, CA: IEEE Computer Society Press, 2004, pp. 657-660.
  • H. Hse and A. R. Newton, "Sketched symbol recognition using Zernike moments," in Proc. 17th Intl. Conf. on Pattern Recognition (ICPR 2004), Vol. 1, Los Alamitos, CA: IEEE Computer Society Press, 2004, pp. 367-370.
  • H. Hse, M. Shilman, and A. R. Newton, "Robust sketched symbol fragmentation using templates," in Proc. 9th Intl. Conf. on Intelligent User Interfaces (IUI '04), New York, NY: ACM, Inc., 2004, pp. 156-160.
  • M. Shilman, H. Pasula, S. J. Russell, and A. R. Newton, "Statistical visual language models for ink parsing," in Proc. 2002 AAAI Spring Symp. on Sketch Understanding, R. Davis, J. Landay, and T. Stahovich, Eds., Menlo Park, CA: AAAI Press, 2002, pp. 126-132.
  • K. Keutzer, S. Malik, and A. R. Newton, "From ASIC to ASIP: The next design discontinuity," in Proc. 2002 IEEE Conf. on Computer Design, Los Alamitos, CA: IEEE Computer Society Press, 2002, pp. 84-90.
  • A. R. Newton, W. C. Rhines, S. Mehrgardt, H. Samueli, and T. Brown, "Embedded systems design in the new millennium (panel session)," in Proc. 37th ACM/IEEE Design Automation Conf. (DAC 2000), New York, NY: ACM, Inc., 2000, pp. 338-339.
  • N. Ghazal, A. R. Newton, and J. M. Rabaey, "Predicting performance potential of modern DSPs," in Proc. 37th Design Automation Conf. (DAC 2000), New York, NY: ACM, Inc., 2000, pp. 332-335.
  • N. Ghazal, A. R. Newton, and J. M. Rabaey, "Retargetable estimation scheme for DSP architecture selection," in Proc. Asia and South Pacific Design Automation Conf. (ASP-DAC 2000), Piscataway, NJ: IEEE, 2000, pp. 485-489.
  • K. Keutzer and A. R. Newton, "The MARCO/DARPA Gigascale Silicon Research Center (Plenary Talk)," in Proc. 1999 Intl. Conf. on Computer Design (ICCD '99), Los Alamitos, CA: IEEE Computer Society Press, 1999, pp. 14-19.
  • W. Buntine, L. Su, and A. R. Newton, "Adaptive approaches to clustering for discrete optimization," in Workshop on Statistical Machine Learning for Large-Scale Optimization, in conjunction with 16th Intl. Joint Conf. on Artificial Intelligence (IJCAI '99), J. Boyan, W. Buntine, and A. Jagota, Eds., Berkeley, CA: ICSI, 1999.
  • A. Tabbara, R. K. Brayton, and A. R. Newton, "Retiming for DSM with area-delay trade-offs and delay constraints," in Proc. 36th Design Automation Conf. (DAC 1999), New York, NY: ACM, Inc., 1999, pp. 725-730.
  • L. Su, W. Buntine, A. R. Newton, and B. S. Peters, "Learning as applied to stochastic optimization for standard cell placement," in Proc. Intl. Conf. on Computer Design (ICCD '98), Los Alamitos, CA: IEEE Computer Society Press, 1998, pp. 622-627.
  • A. R. Newton, B. Beeres, J. Hilbert, A. Naidu, B. Payne, L. J. Reed, M. Stibitz, and H. Yoshizawa, "Technical challenges of IP and system-on-chip: The ASIC vendor perspective (panel session)," in Proc. 35th ACM/IEEE Design Automation Conf. (DAC 1998), New York, NY: ACM, Inc., 1998, pp. 501-501.
  • F. L. Chan, M. D. Spiller, and A. R. Newton, "WELD--An environment for web-based electronic design," in Proc. ACM/IEEE 35th Design Automation Conf. (DAC 1998), New York, NY: ACM, Inc., 1998, pp. 146-151.
  • J. S. Young, J. MacDonald, M. Shilman, A. Tabbara, P. N. Hilfinger, and A. R. Newton, "Design and specification of embedded systems in Java using successive, formal refinement," in Proc. ACM/IEEE 35th Design Automation Conf. (DAC 1998), New York, NY: ACM, Inc., 1998, pp. 70-75.
  • P. Buch, A. Narayan, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Logic synthesis for large pass transistor circuits," in 1997 IEEE/ACM Intl. Conf. on Computer-Aided Design (ICCAD 1997). Digest of Techical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1997, pp. 663-670.
  • M. D. Spiller and A. R. Newton, "EDA and the network," in 1997 IEEE/ACM Intl. Conf. on Computer-Aided Design (ICCAD 1997). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1997, pp. 470-476.
  • W. L. Buntine, L. Su, A. R. Newton, and A. Mayer, "Adaptive methods for netlist partitioning," in 1997 IEEE/ACM Intl. Conf. on Computer-Aided Design (ICCAD 1997). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1997, pp. 356-363.
  • P. Buch, C. K. Lennard, and A. R. Newton, "Engineering change for power optimization using global sensitivity and synthesis flexibility," in Proc. 1997 Intl. Symp. on Low Power Electronics and Design, New York, NY: ACM, Inc., 1997, pp. 88-91.
  • P. Buch, C. K. Lennard, and A. R. Newton, "Rewiring for power optimization," in Proc. 6th Intl. Workshop on Logic Synthesis (IWLS '97), 1997.
  • K. Keutzer, A. R. Newton, and N. V. Shenoy, "The future of logic synthesis and physical design in deep-submicron process geometries," in Proc. 1997 Intl. Symp. on Physical Design, New York, NY: ACM, Inc., 1997, pp. 218-224.
  • W. C. Baker and A. R. Newton, "The maximal VHDL subset with a cycle-level abstraction," in Proc. 1996 European Design Automation Conf. (EURO-DAC '96) with EURO-VHDL '96 and Exhibition, Los Alamitos, CA: IEEE Computer Society Press, 1996, pp. 470-475.
  • C. K. Lennard, P. Buch, and A. R. Newton, "Logic synthesis using power-sensitive Don't Care sets," in 1996 Intl. Symp. on Low Power Electronics and Design. Digest of Technical Papers, New York, NY: IEEE, 1996, pp. 293-296.
  • A. N. Soloviov, A. R. Newton, and K. S. Mostov, "Conceptual design of complex electronic systems as a directive process in an environment of uncertainty and imprecision," in Soft Computing: Proc. 3rd Intl. Workshop on Rough Sets and Soft Computing (RSSC '94), T. Y. Lin and A. M. Wildberger, Eds., San Diego, CA: The Society of Computer Simulation, 1995, pp. 546-553.
  • C. K. Lennard and A. R. Newton, "An estimation technique to guide low power resynthesis algorithms," in Proc. 1995 Intl. Symp. on Low Power Design (ISPLD '95), New York, NY: ACM, Inc., 1995, pp. 227-232.
  • E. Siepmann and A. R. Newton, "TOBAC: A test case browser for testing object-oriented software," in Proc. 1994 ACM SIGSOFT Intl. Symp. on Software Testing and Analysis (ISSTA), T. Ostrand, Ed., New York, NY: ACM, Inc., 1994, pp. 154-168.
  • W. C. Baker and A. R. Newton, "An application of a synchronous/reactive semantics to the VHDL language," in Proc. 6th Intl. Workshop on High-Level Synthesis, D. D. Gajski, Ed., New York, NY: ACM, Inc., 1992, pp. 273-278.
  • J. S. Roychowdhury, D. O. Pederson, and A. R. Newton, "An exact analytic technique for simulating uniform RC lines," in Proc. 1992 European Design Automation Conf. (EURO-VHDL '92, EURO-DAC '92), Los Alamitos, CA: IEEE Computer Society Press, 1992, pp. 416-420.
  • M. Pabst, T. Villa, and A. R. Newton, "Experiments on the synthesis and testability of non-scan finite state machines," in Proc. 1992 European Design Automation Conf. (EURO-VHDL '92, EURO-DAC '92), Los Alamitos, CA: IEEE Computer Society Press, 1992, pp. 537-542.
  • J. S. Roychowdhury, D. O. Pederson, and A. R. Newton, "Simulating lossy interconnect with high frequency nonidealities in linear time," in Proc. 29th ACM/IEEE Design Automation Conf. (DAC '92), Los Alamitos, CA: IEEE Computer Society Press, 1992, pp. 75-80.
  • A. R. Newton, "Design technology requirements for multi-chip modules," in Wescon Conf. Record, 1991, Los Angeles, CA: Western Periodicals, 1991, pp. 534-538. [abstract]
  • J. S. Roychowdhury, D. O. Pederson, and A. R. Newton, "An impulse-response based linear time-complexity algorithm for lossy interconnect simulation," in 1991 IEEE Conf. on Computer-Aided Design (ICCAD-91). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1991, pp. 62-65.
  • C. Kring and A. R. Newton, "A cell-replicating approach to minicut-based circuit partitioning," in 1991 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-91). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1991, pp. 2-5.
  • B. Lin and A. R. Newton, "Implicit manipulation of equivalence classes using binary decision diagrams," in Proc. 1991 IEEE Intl. Conf. on Computer Design (ICCD '91), Los Alamitos, CA: IEEE Computer Society Press, 1991, pp. 81-85.
  • A. R. Newton, J. Baht, M. Goldstein, A. Graham, T. Inoue, T. Kalekos, B. Steinmuller, D. Wade, and M. Weaver, "Framework standards: How important are they? (panel abstract)," in Proc. 28th ACM/IEEE Design Automation Conf. (DAC 1991), New York, NY: ACM, Inc., 1991, pp. 315-315.
  • T. Sakurai, M. Ichida, and A. R. Newton, "Fast simulated diffusion: An optimization algorithm for multi-minimum problems and its application to MOSFET model parameter extraction," in Proc. IEEE 1991 Custom Integrated Circuits Conf. (CICC '91), New York, NY: IEEE, 1991, pp. 8.8/1-4.
  • P. Ashar, A. Ghosh, S. Devadas, and A. R. Newton, "Implicit state transition graphs: Applications to sequential logic synthesis and test," in 1990 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-90). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 84-87.
  • B. Lin, H. J. Touati, and A. R. Newton, "Don't care minimization of multi-level sequential logic networks," in 1990 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-90). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 414-417.
  • A. Ghosh, S. Devadas, and A. R. Newton, "Sequential logic synthesis for testability using register-transfer level descriptions," in Proc. Intl. Test Conf. (ITC 1990), Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 274-283.
  • P. Ashar, S. Devadas, and A. R. Newton, "Testability driven synthesis of interacting finite state machines," in Proc. 1990 IEEE Intl. Conf. on Computer Design (ICCD '90), Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 273-276.
  • A. Ghosh, S. Devadas, and A. R. Newton, "Heuristic minimization of Boolean relations using testing techniques," in Proc. 1990 IEEE Intl. Conf. on Computer Design (ICCD '90), Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 277-281.
  • A. R. Newton, "Standards, openness and design environments in electronic design automation (panel abstract)," in Proc. 27th ACM/IEEE Design Automation Conf. (DAC '90), Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 497-498.
  • G. S. Whitcomb and A. R. Newton, "Abstract data types and high level synthesis," in Proc. 27th ACM/IEEE Conf. on Design Automation (DAC '90), New York, NY: ACM, Inc., 1990, pp. 680-685.
  • P. Ashar, S. Devadas, and A. R. Newton, "A unified approach to the decomposition and re-decomposition of sequential machines," in Proc. 27th ACM/IEEE Conf. on Design Automation (DAC '90), New York, NY: ACM, Inc., 1990, pp. 601-606.
  • A. A. Malik, R. K. Brayton, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Reduced offsets for two-level multi-valued logic minimization," in Proc. 275h ACM/IEEE Conf. on Design Automation (DAC '90), New York, NY: ACM, Inc., 1990, pp. 290-296.
  • A. Ghosh, S. Devadas, and A. R. Newton, "Sequential test generation at the register-transfer and logic levels," in Proc. 27th ACM/IEEE Design Automation Conf. (DAC '90), New York, NY: ACM, Inc., 1990, pp. 580-586.
  • A. Ghosh, S. Devadas, and A. R. Newton, "Verification of interacting sequential circuits," in Proc. 27th ACM/IEEE Conf. on Design Automation (DAC '90), New York, NY: ACM, Inc., 1990, pp. 213-219.
  • A. Casotto, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Design management based on design traces," in Proc. 27th ACM/IEEE Conf. on Design Automation (DAC '90), New York, NY: ACM, Inc., 1990, pp. 136-141.
  • T. Sakurai and A. R. Newton, "A simple short-channel MOSFET model and its application to delay analysis of inverters and series-connected MOSFETs," in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS 1990), Vol. 1, New York, NY: IEEE, 1990, pp. 105-108.
  • B. W. O'Krafka and A. R. Newton, "An empirical evaluation of two memory-efficient directory methods," in Proc. 17th Annual Intl. Symp. on Computer Architecture (ISCA 1990), J. Baer and L. Snyder, Eds., Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 138-147.
  • P. Ashar, S. Devadas, and A. R. Newton, "Multiple fault testable sequential circuits," in Proc. 1990 IEEE Intl. Symp. on Circuits and Systems (ISCAS-90), Vol. 4, New York, NY: IEEE, 1990, pp. 3118-3121.
  • S. Devadas and A. R. Newton, "Exact algorithms for output encoding, state assignment and four-level Boolean minimization," in Proc. 23rd Annual Hawaii Intl. Conf. on System Sciences, Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 387-396.
  • S. Devadas, H. K. T. Ma, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Irredundant sequential machines via optimal logic synthesis," in Proc. 23rd Annual Hawaii Intl. Conf. on System Sciences, Los Alamitos, CA: IEEE Computer Society Press, 1990, pp. 417-426.
  • A. Ghosh, S. Devadas, and A. R. Newton, "Test generation for highly sequential circuits," in 1989 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-89). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1989, pp. 362-365.
  • P. Ashar, S. Devadas, and A. R. Newton, "Optimum and heuristic algorithms for finite state machine decomposition and partitioning," in 1989 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-89). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1989, pp. 216-219.
  • M. Beardslee, C. Kring, R. Murgai, H. Savoj, R. K. Brayton, and A. R. Newton, "SLIP: A software environment for System Level Interactive Partitioning," in 1989 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-89). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1989, pp. 280-283.
  • B. Lin and A. R. Newton, "A generalized approach to the constrained cubical embedding problem," in Proc. IEEE Intl. Conf. on Computer Design (ICCD '89), Washington, DC: IEEE Computer Society Press, 1989, pp. 400-403.
  • S. Devadas, H. K. T. Ma, and A. R. Newton, "Redundancies and don't cares in sequential logic synthesis," in Proc. Intl. Test Conf. (ITC 1989), Washington, DC: IEEE Computer Society Press, 1989, pp. 491-500.
  • S. Devadas, H. K. T. Ma, and A. R. Newton, "Easily testable PLA-based finite state machines," in 19th Intl. Symp. on Fault-Tolerant Computing, 1989 (FTCS-19). Digest of Papers, Washington, DC: IEEE Computer Society Press, 1989, pp. 102-109.
  • M. Silva, D. Gedye, R. H. Katz, and A. R. Newton, "Protection and versioning for OCT," in Proc. 26th ACM/IEEE Design Automation Conf. (DAC '89), New York, NY: ACM, Inc., 1989, pp. 264-269.
  • A. A. Malik, R. K. Brayton, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "A modified approach to two-level logic minimization," in 1988 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-88). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 106-109.
  • S. Devadas and A. R. Newton, "Decomposition and factorization of sequential finite state machines," in 1988 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-88). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 148-151.
  • S. Devadas, A. R. Wang, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Boolean decomposition in multi-level logic optimization," in 1988 IEEE Intl. Conf. on Computer-Aided Design (ICCAD-88). Digest of Technical Papers, Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 290-293.
  • R. L. Spickelmier and A. R. Newton, "CRITIC: A knowledge-based program for critiquing circuit designs," in Proc. 1988 IEEE Intl. Conf. on Computer Design (ICCD '88), Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 324-327.
  • S. Devadas, H. K. T. Ma, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Optimal logic synthesis and testability: Two faces of the same coin," in Proc. Intl. Test Conf. (ITC 1988), Washington, DC: IEEE Computer Society Press, 1988, pp. 4-12.
  • H. K. T. Ma, S. Devadas, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "An incomplete scan design approach to test generation for sequential machines," in Proc. Intl. Test Conf. (ITC 1988), Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 730-734.
  • S. Devadas, H. K. T. Ma, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Synthesis and optimization procedures for fully and easily testable sequential machines," in Proc. Intl. Test Conf. (ITC 1988), Los Alamitos, CA: IEEE Computer Society, 1988, pp. 621-630.
  • A. R. Newton, "Invited Paper: Twenty-five years of electronic design automation," in Proc. 25th ACM/IEEE Design Automation Conf. (DAC '88), A. R. Newton, Ed., Los Alamitos, CA: IEEE Computer Society Press, 1988, pp. 2-2.
  • S. Devadas, A. R. Wang, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Boolean decomposition of programmable logic arrays," in Proc. 10th Annual IEEE Custom Integrated Circuits Conf. (CICC-88), New York, NY: IEEE, 1988, pp. 2.5/1-5.
  • A. R. Newton, "Invited Talk: Design representation and design management for electronic systems," in Advanced Research in VLSI: Proc. 5th MIT Conf., J. Allen and F. T. Leighton, Eds., Cambridge, MA: MIT Press, 1988, pp. 369-369. [abstract]
  • H. K. T. Ma, S. Devadas, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Test generation for sequential finite state machines," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-87). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1987, pp. 288-291.
  • S. Devadas, H. K. T. Ma, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "MUSTANG: State assignment of finite state machines for optimal multi-level logic implementations," in Proc. IEEE Intl. Conf. on Computer-Aided Design (ICCAD-87). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1987, pp. 16-19.
  • S. H. Hwang and A. R. Newton, "An efficient design correctness checker of finite state machines," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-87). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1987, pp. 410-413.
  • J. L. Burns and A. R. Newton, "Efficient constraint generation for hierarchical compaction," in Proc. 1987 IEEE Intl. Conf. on Computer Design (ICCD '87), Washington, DC: IEEE Computer Society Press, 1987, pp. 197-200. [abstract]
  • S. Devadas and A. R. Newton, "Algorithms for hardware allocation in data path synthesis," in Proc. 1987 IEEE Intl. Conf. on Computer Design (ICCD '87), Washington, DC: IEEE Computer Society Press, 1987, pp. 526-531. [abstract]
  • B. Lin and A. R. Newton, "Best Paper Award: KAHLUA: A hierarchical circuit disassembler," in Proc. 24th ACM/IEEE Design Automation Conf. (DAC '87), A. O'Neill and D. Thomas, Eds., New York, NY: ACM, Inc., 1987, pp. 311-317.
  • S. Devadas, H. K. T. Ma, and A. R. Newton, "On the verification of sequential machines at differing levels of abstraction," in Proc. 24th ACM/IEEE Design Automation Conf. (DAC '87), A. O'Neill and D. Thomas, Eds., New York, NY: ACM, Inc., 1987, pp. 271-276.
  • A. R. Newton, "Electronic design interchange format-introduction to (EDIF Version 2 0 0)," in Proc. IEEE 1987 Custom Integrated Circuits Conf. (CICC '87), New York, NY: IEEE, 1987, pp. 531-535. [abstract]
  • C. H. Séquin, A. L. Sangiovanni-Vincentelli, and A. R. Newton, "The Berkeley Synthesis Project [VLSI]," in 1987 Symp. on VLSI Circuits. Digest of Technical Papers, Piscataway, NJ: IEEE, 1987, pp. 1-4. [abstract]
  • G. K. Jacob, A. R. Newton, and D. O. Pederson, "Parallel linear-equation solution in direct-method circuit simulators," in Proc. 1987 IEEE Intl. Symp. on Circuits and Systems (ISCAS-87), New York, NY: IEEE, 1987, pp. 1056-1059.
  • R. A. Saleh and A. R. Newton, "An event-driven, relaxation-based multirate integration scheme for circuit simulation," in Proc. 1987 IEEE Intl. Symp. on Circuits and Systems (ISCAS-87), New York, NY: IEEE, 1987, pp. 600-603. [abstract]
  • S. Devadas and A. R. Newton, "Data path synthesis from behavioral descriptions: An algorithmic approach," in Proc. 1987 IEEE Intl. Symp. on Circuits and Systems (ISCAS-87), New York, NY: IEEE, 1987, pp. 398-401. [abstract]
  • D. S. Harrison, P. Moore, R. L. Spickelmier, and A. R. Newton, "Data management and graphics editing in the Berkeley design environment," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-86). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1986, pp. 24-27. [abstract]
  • C. H. Séquin, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Highlights of VLSI research at Berkeley," in 1986 Proc. Fall Joint Computer Conf. (FJCC-86), H. S. Stone, Ed., Washington, DC: IEEE Computer Society Press, 1986, pp. 894-898.
  • S. H. Hwang, Y. H. Kim, and A. R. Newton, "An accurate delay modeling technique for switch-level timing verification," in Proc. 23rd ACM/IEEE Design Automation Conf. (DAC '86), Washington, DC: IEEE Computer Society Press, 1986, pp. 227-233.
  • S. Devadas and A. R. Newton, "GENIE: A generalized array optimizer for VLSI synthesis," in Proc. 23rd ACM/IEEE Design Automation Conf. (DAC '86), Washington, DC: IEEE Computer Society Press, 1986, pp. 631-637.
  • G. K. Jacob, A. R. Newton, and D. O. Pederson, "An empirical analysis of the performance of a multiprocessor-based circuit simulator," in Proc. 23rd ACM/IEEE Design Automation Conf. (DAC '86), Washington, DC: IEEE Computer Society Press, 1986, pp. 588-593.
  • G. K. Jacob, A. R. Newton, and D. O. Pederson, "Direct method circuit simulation using multiprocessors," in Proc. 1986 IEEE Intl. Symp. on Circuits and Systems (ISCAS-86), New York, NY: IEEE, 1986, pp. 170-173. [abstract]
  • J. L. Burns and A. R. Newton, "SPARCS: A new constraint-based IC symbolic layout spacer," in Proc. 1986 IEEE Custom Integrated Circuits Conf. (CICC-86), New York, NY: IEEE, 1986, pp. 534-539. [abstract]
  • S. Devadas and A. R. Newton, "Topological optimization of multiple level array logic: On uni and multi-processors," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-86). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1986, pp. 38-41. [abstract]
  • R. L. Spickelmier and A. R. Newton, "Connectivity verification using a rule-based approach," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-85). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1985, pp. 190-192. [abstract]
  • J. K. White, R. A. Saleh, A. L. Sangiovanni-Vincentelli, and A. R. Newton, "Accelerating relaxation algorithm for circuit simulation using waveform Newton, iterative step size refinement, and parallel techniques," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-85). Digest of Technical Papers, Washington, DC: IEEE Computer Society Press, 1985, pp. 5-7. [abstract]
  • M. Hofmann and A. R. Newton, "A domino CMOS logic synthesis system," in Proc. 1985 IEEE Intl. Symp. on Circuits and Systems (ICCAD-85), New York, NY: IEEE, 1985, pp. 411-414. [abstract]
  • C. Lob, R. Spickelmier, and A. R. Newton, "Circuit verification using rule-based expert systems," in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS-85), New York, NY: IEEE, 1985, pp. 881-884. [abstract]
  • A. R. Newton, "Design and implementation of database management systems for VLSI design," in Proc. IEEE 1985 Custom Integrated Circuits Conf. (CICC '85), New York, NY: IEEE, 1985, pp. 370-370. [abstract]
  • C. Lob and A. R. Newton, "RUBICC: A rule-based expert system for VLSI integrated circuit critique," in Proc. 1985 IEEE Custom Integrated Circuits Conf. (CICC-85), New York, NY: IEEE, 1985, pp. 379-383. [abstract]
  • Y. H. Kim, J. E. Kleckner, R. A. Saleh, and A. R. Newton, "Electrical-logic simulation," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-84). Digest of Technical Papers, New York, NY: IEEE, 1984, pp. 7-9. [abstract]
  • G. H. Mah and A. R. Newton, "PANDA: A PLA generator for multiply-folded PLAs," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-84). Digest of Technical Papers, New York, NY: IEEE, 1984, pp. 122-124.
  • J. T. Deutsch and A. R. Newton, "MSPLICE: A multiprocessor-based circuit simulator," in Proc. 1984 Intl. Conf. on Parallel Processing, R. M. Keller, Ed., Silver Spring, MD: IEEE Computer Society Press, 1984, pp. 207-214. [abstract]
  • J. T. Deutsch and A. R. Newton, "A multiprocessor implementation of relaxation-based electrical circuit simulation," in Proc. 21st ACM/IEEE Design Automation Conf. (DAC '84), New York, NY: ACM, Inc., 1984, pp. 350-357.
  • A. R. Newton, "Design work-stations," in Proc. 9th European Solid-State Circuits Conf. (ESSCIRC '83), Lausanne, Switzerland: Presses Polytechniques Romandes, 1983, pp. 147-154. [abstract]
  • R. A. Saleh, J. E. Kleckner, and A. R. Newton, "Iterated timing analysis in SPLICE1," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-83). Digest of Technical Papers, New York, NY: IEEE, 1983, pp. 139-140. [abstract]
  • R. L. Spickelmier and A. R. Newton, "WOMBAT: A new netlist comparison program," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-83). Digest of Technical Papers, New York, NY: IEEE, 1983. [abstract]
  • J. T. Deutsch and A. R. Newton, "Data-flow based behavioral-level simulation and synthesis," in IEEE Intl. Conf. on Computer-Aided Design (ICCAD-83). Digest of Technical Papers, New York, NY: IEEE, 1983, pp. 63-64. [abstract]
  • J. L. Burns, A. R. Newton, and D. O. Pederson, "Active device table look-up models for circuit simulation," in Proc. 1983 IEEE Intl. Symp. on Circuits and Systems (ISCAS-83), New York, NY: IEEE, 1983, pp. 250-253. [abstract]
  • J. E. Kleckner, R. A. Saleh, and A. R. Newton, "Electrical consistency in schematic simulation," in IEEE Intl. Conf. on Circuits and Computers (ICCC-82), New York, NY: IEEE, 1982, pp. 30-33. [abstract]
  • A. R. Newton, "A survey of computer aids for VLSI layout," in 1982 Symp. on VLSI Technology. Digest of Technical Papers, New York, NY: IEEE, 1982, pp. 72-75. [abstract]
  • G. D. Hachtel, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "Techniques for Programmable Logic Array folding," in Proc. 19th ACM/IEEE Design Automation Conf. (ICCAD-82), New York, NY: IEEE, 1982, pp. 147-155.
  • K. H. Keller, A. R. Newton, and S. Ellis, "A symbolic design system for integrated circuits," in Proc. 19th ACM/IEEE Design Automation Conf. (ICCAD-82), New York, NY: IEEE, 1982, pp. 460-466.
  • S. A. Ellis, K. H. Keller, A. R. Newton, D. O. Pederson, A. L. Sangiovanni-Vincentelli, and C. H. Séquin, "A symbolic layout design system," in Proc. 1982 IEEE Symp. on Circuits and Systems (ISCAS-82), New York, NY: IEEE, 1982, pp. 670-676. [abstract]
  • R. K. Brayton, G. D. Hachtel, L. A. Hemachandra, A. R. Newton, and A. L. Sangiovanni-Vincentelli, "A comparison of logic minimization strategies using ESPRESSO: An APL program package for partitioned logic minimalization," in Proc. 1982 IEEE Intl. Symp. on Circuits and Systems (ISCAS-82), New York, NY: IEEE, 1982, pp. 42-48. [abstract]
  • A. R. Newton, "An integrated design system for VLSI circuits," in Proc. VLSI Design Conf., Amsterdam, Netherlands: North-Holland, 1982, pp. 10-13.
  • K. K. Keller and A. R. Newton, "KIC2: A low-cost, interactive editor for integrated circuits design," in 24th IEEE Computer Society Intl. Conf. (COMPCON'82). Digest of Papers, Los Alamitos, CA: IEEE Computer Society Press, 1982, pp. 305-306.
  • A. R. Newton, "A blue collar language for CAD," in Proc. IEEE Computer Society Intl. Conf. (COMPCON '80), New York, NY: IEEE, 1980, pp. 81-82. [abstract]
  • G. D. Hachtel, A. L. Sangiovanni-Vincentelli, and A. R. Newton, "Some results in optimal PLA folding (Invited Paper)," in Proc. IEEE Intl. Conf. on Circuits and Computers (ICCC '80), Vol. 2, New York, NY: IEEE, 1980, pp. 1023-1027. [abstract]
  • G. De Micheli, A. L. Sangiovanni-Vincentelli, and A. R. Newton, "New algorithms for timing analysis of large circuits," in Proc. IEEE Intl. Symp. on Circuits and Systems (ISCAS-80), Vol. 2, New York, NY: IEEE, 1980, pp. 439-443. [abstract]
  • A. R. Newton, "The analysis of floating capacitors for timing simulation," in Conf. Record 13th Asilomar Conf. on Circuits, Systems & Computers, New York, NY: IEEE, 1979, pp. 433-436. [abstract]
  • J. D. Crawford, A. R. Newton, D. O. Pederson, and G. R. Boyle, "A unified hardware description language for CAD programs," in Proc. 4th IEEE Intl. Symp. on Computer Hardware Description Languages, New York, NY: IEEE, 1979, pp. 151-154. [abstract]
  • H. DeMan and A. R. Newton, "Hybrid simulation," in Proc. 1979 IEEE Intl. Symp. on Circuits and Systems (ISCAS '79), New York, NY: IEEE, 1979, pp. 249-252.
  • A. R. Newton and D. O. Pederson, "A simulation program with large-scale integrated circuit emphasis," in Proc. 1978 IEEE Intl. Symp. on Circuits and Systems (ISCAS-78), New York, NY: IEEE, 1978, pp. 1-4. [abstract]
  • M. Y. Hsueh, A. R. Newton, and D. O. Pederson, "The development of macromodels for MOS timing simulators," in Proc. 1978 IEEE Intl. Symp. on Circuits and Systems (ISCAS-78), New York, NY: IEEE, 1978, pp. 345-349. [abstract]
  • A. R. Newton and D. O. Pederson, "Analysis time, accuracy and memory requirement tradeoffs in SPICE2," in Conf. Record 11th Asilomar Conf. on Circuits, Systems and Computers, New York, NY: IEEE, 1977, pp. 6-9.
  • M. Y. Hseuh, A. R. Newton, and D. O. Pederson, "New approaches to modeling and electrical simulation of LSI logic circuits," in Modelling Semiconductor Devices, Llausanne, Switzerland: EPFL, 1977, pp. 403-413. [abstract]
  • A. R. Newton and G. L. Taylor, "BIASL.25 -- An MOS circuit simulation program for a programmable calculator," in Conf. Record 10th Annual Asilomar Conf. on Circuit, Systems and Computers, New York, NY: IEEE, 1976, pp. 280-283.
  • S. P. Fan, M. Y. Hsueh, A. R. Newton, and D. O. Pederson, "MOTIS-C: A new circuit simulator for MOS LSI circuits," in Proc. 1977 IEEE Intl. Symp. on Circuits and Systems (ISCAS-77), New York, NY: IEEE, 1975, pp. 700-703. [abstract]

Technical Reports

Unpublished articles

  • A. R. Newton, "A Proposal for Collaborative Research in the Design and Test of Silicon-Based Systems," May 1998.

Talks or presentations