Articles in journals or magazines

• O. Tanovic, A. Megretski, Y. Li, V. Stojanovic, and M. Osqui, "Equivalent Baseband Models and Corresponding Digital Predistortion for Compensating Dynamic Passband Nonlinearities in Phase-Amplitude Modulation-Demodulation Schemes," IEEE Transactions on Signal Processing, vol. 66, no. 22, pp. 5972-5987, 2018.
• Y. Kang, J. Bokor, and V. Stojanovic, "Design Requirements for a Spintronic MTJ Logic Device for Pipelined Logic Applications," IEEE Transactions on Electron Devices, vol. 63, no. 4, pp. 1754--1761, 2016.
• C. Sorace-Agaskar, J. Leu, M. R. Watts, and V. Stojanovic, "Electro-optical co-simulation for integrated CMOS photonic circuits with VerilogA," Opt. Express, vol. 23, no. 21, pp. 27180--27203, Oct. 2015.
• A. Suleiman, R. Sredojevic, and V. Stojanovic, "Model Predictive Control Equalization for High-Speed I/O Links," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 2, pp. 371-381, 2014.
• Y. Li, Z. Li, O. Uyar, Y. Avniel, A. Megretski, and V. Stojanovic, "High-Throughput Signal Component Separator for Asymmetric Multi-Level Outphasing Power Amplifiers," IEEE Journal of Solid-State Circuits, vol. 48, no. 2, pp. 369-380, 2013.
• F. Lim and V. Stojanovic, "On U-Statistics and Compressed Sensing I: Non-Asymptotic Average-Case Analysis," IEEE Transactions on Signal Processing, vol. 61, no. 10, pp. 2473-2485, 2013.
• F. Chen, F. Lim, O. Abari, A. Chandrakasan, and V. Stojanovic, "Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 60, no. 3, pp. 650-661, 2013.
• F. Lim and V. Stojanovic, "On U-Statistics and Compressed Sensing II: Non-Asymptotic Worst-Case Analysis," IEEE Transactions on Signal Processing, vol. 61, no. 10, pp. 2486-2497, 2013.
• T. K. Liu, D. Markovic, V. Stojanovic, and E. Alon, "The relay reborn," IEEE Spectrum, vol. 49, no. 4, pp. 40-43, 2012.
• M. Zhang, V. Stojanovic, and P. Ampadu, "Reliable Ultra-Low-Voltage Cache Design for Many-Core Systems," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, no. 12, pp. 858-862, 2012.
• S. D. Vamvakos, V. Stojanovic, and B. Nikolic, "Discrete-Time, Linear Periodically Time-Variant Phase-Locked Loop Model for Jitter Analysis," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 6, pp. 1211-1224, 2011.
• N. Blitvic, M. Lee, and V. Stojanovic, "Channel Coding For High-Speed Links: A Systematic Look at Code Performance and System Simulation," IEEE Transactions on Advanced Packaging, vol. 32, no. 2, pp. 268-279, 2009.
• C. Batten, A. Joshi, J. Orcutt, A. Khilo, B. Moss, C. W. Holzwarth, M. A. Popovic, H. Li, H. I. Smith, J. L. Hoyt, F. X. Kartner, R. J. Ram, V. Stojanovic, and K. Asanovic, "Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics," IEEE Micro, vol. 29, no. 4, pp. 8-21, 2009.

Technical Reports

• S. Beamer, C. Sun, Y. Kwon, A. Joshi, C. Batten, V. Stojanovic, and K. Asanović, "Re-architecting DRAM with Monolithically Integrated Silicon Photonics," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2009-179, Dec. 2009.
• S. Beamer, K. Asanović, C. Batten, A. Joshi, and V. Stojanovic, "Designing Multi-socket Systems Using Silicon Photonics," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2009-9, Jan. 2009.

Patents

• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 9,106,397. Aug. 2015.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Partial response receiver," U.S. Patent 9,025,678. May 2015.
• V. Stojanovic, A. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 9,000,803. April 2015.
• V. Stojanovic, A. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 8,994,398. March 2015.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Clock data recovery circuit with equalizer clock calibration," U.S. Patent 8,861,667. Oct. 2014.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 8,654,829. Feb. 2014.
• V. Stojanovic, A. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 8,564,328. Oct. 2013.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-Tap Equalizer," U.S. Patent 8,467,437. June 2013.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 8,472,511. June 2013.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Equalizing receiver," U.S. Patent 8,428,196. April 2013.
• F. F. Chen and V. Stojanovic, "Equalizing transceiver with reduced parasitic capacitance," U.S. Patent 8,330,503. Dec. 2012.
• J. L. Zerbe and V. Stojanovic, "Bit-error rate in fixed line-rate systems," U.S. Patent 8,311,145. Nov. 2012.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Partial response receiver," U.S. Patent 8,170,163. May 2012.
• V. Stojanovic, A. C. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 8,183,887. May 2012.
• V. Stojanovic, A. Amirkhany, and J. L. Zerbe, "Multi-tone system with oversampled precoders," U.S. Patent 8,139,675. March 2012.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 8,023,584. Sep. 2011.
• F. F. Chen and V. Stojanovic, "Equalizing transceiver with reduced parasitic capacitance," U.S. Patent 7,982,507. July 2011.
• V. Stojanovic, A. Amirkhany, and J. L. Zerbe, "Adjustable dual-band link," U.S. Patent 7,907,676. March 2011.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 7,873,115. Jan. 2011.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 7,860,156. Dec. 2010.
• V. Stojanovic, A. Amirkhany, and J. L. Zerbe, "Multi-tone system with oversampled precoders," U.S. Patent 7,817,743. Oct. 2010.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Partial response receiver," U.S. Patent 7,715,501. May 2010.
• E. Alon, V. Stojanovic, and A. Amirkhany, "Digital transmitter with data stream transformation circuitry," U.S. Patent 7,711,063. May 2010.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Partial response receiver," U.S. Patent 7,706,480. April 2010.
• A. Ho, V. Stojanovic, F. F. Chen, E. Alon, and M. A. Horowitz, "Noise-tolerant signaling schemes supporting simplified timing and data recovery," U.S. Patent 7,672,380. March 2010.
• V. Stojanovic, A. C. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 7,656,981. Feb. 2010.
• V. Stojanovic, A. Amirkhany, and J. L. Zerbe, "Adjustable dual-band link," U.S. Patent 7,599,422. Oct. 2009.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 7,508,871. March 2009.
• A. Amirkhany, V. Stojanovic, E. Alon, J. L. Zerbe, and M. Horowitz, "Linear transformation circuits," U.S. Patent 7,483,491. Jan. 2009.
• V. Stojanovic and A. Amirkhany, "Adjustable dual-band link," U.S. Patent 7,450,629. Nov. 2008.
• B. W. Garlepp, J. L. Zerbe, M. Jeeradit, and V. Stojanovic, "Partial response receiver with clock data recovery," U.S. Patent 7,433,397. Oct. 2008.
• V. Stojanovic, "Data-level clock recovery," U.S. Patent 7,412,016. Aug. 2008.
• V. Stojanovic, M. A. Horowitz, J. L. Zerbe, A. Bessios, A. C. Ho, J. C. Wei, G. Tsang, and B. W. Garlepp, "Partial response receiver," U.S. Patent 7,397,848. July 2008.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Auto-configured equalizer," U.S. Patent 7,362,800. April 2008.
• F. F. Chen and V. Stojanovic, "Equalizing transceiver with reduced parasitic capacitance," U.S. Patent 7,348,811. March 2008.
• V. Stojanovic, A. Amirkhany, and J. L. Zerbe, "Adjustable dual-band link," U.S. Patent 7,349,484. March 2008.
• J. L. Zerbe, V. Stojanovic, and F. F. Chen, "Selectable-tap equalizer," U.S. Patent 7,292,629. Nov. 2007.
• V. Stojanovic, A. Ho, F. F. Chen, and B. W. Garlepp, "Offset cancellation in a multi-level signaling system," U.S. Patent 7,233,164. June 2007.
• V. Stojanovic, A. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation," U.S. Patent 7,199,615. April 2007.
• J. M. Kahn, M. A. Horowitz, E. Alon, and V. Stojanovic, "Adaptive control for mitigating interference in a multimode transmission medium," U.S. Patent 7,194,155. March 2007.
• A. Ho and V. Stojanovic, "Signal receiver with data precessing function," U.S. Patent 7,176,721. Feb. 2007.
• V. Stojanovic, A. C. C. Ho, A. Bessios, F. F. Chen, E. Alon, and M. A. Horowitz, "High speed signaling system with adaptive transmit pre-emphasis," U.S. Patent 7,126,378. Oct. 2006.
• V. Stojanovic, "Data-level clock recovery," U.S. Patent 7,092,472. Aug. 2006.
• A. Ho, A. Bessios, F. F. Chen, E. Alon, M. A. Horowitz, and V. Stojanovic, "High speed signaling system with adaptive transmit pre-emphasis and reflection cancellation," U.S. Patent 7,030,657. April 2006.
• J. L. Zerbe, V. Stojanovic, M. A. Horowitz, and P. S. Chau, "Input/output circuit with on-chip inductor to reduce parasitic capacitance," U.S. Patent 7,005,939. Feb. 2006.
• F. F. Chen and V. Stojanovic, "Equalizing transceiver with reduced parasitic capacitance," U.S. Patent 6,982,587. Jan. 2006.

Ph.D. Theses

• R. Rabbani, "Towards a Wireless Fluorescence Microscope on A Chip," M. Anwar, V. Stojanovic, R. Muller, and A. Niknejad, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2025-31, May 2025.
• B. Yin, "Cryogenic Optical Link: Device, Circuit, and System," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2025-28, May 2025.
• C. Adamopoulos, "Fully Integrated Electronic-Biophotonic System-on-Chip for Real-Time Label-Free Molecular Sensing," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2023-241, Dec. 2023.
• P. Zarkos, "Realization of a Fully Integrated Electronic-Photonic Sensor-Receiver Array for Endoscopic Ultrasound," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2023-35, May 2023.
• P. Bhargava, "Optical Beamforming Techniques for Solid-State Automotive LIDAR," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2023-30, May 2023.
• N. Narevsky, "Energy Efficient Communication Links for Smart Devices," J. M. Rabaey, V. Stojanovic, and B. Olshausen, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2022-16, May 2022.
• N. Mehta, "Enhancing Performance of Analog Mixed Signal Circuits using Integrated Silicon-Photonics," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2020-195, Dec. 2020.
• V. Stojanovic, "Photonic Links -- From Theory to Automated Design," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2019-7, April 2019.
• S. Moazeni and V. Stojanovic, "Energy-efficient and High-bandwidth Density Monolithic Optical Transceivers in Advanced CMOS Processes," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2018-100, Aug. 2018.
• S. Lin, "Electronic-Photonic Co-Design of Silicon Photonic Interconnects," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2017-208, Dec. 2017.

Masters Reports

• H. S. Oh and V. Stojanovic, "Silicon Microring Resonator Design for Monolithic Electronic–Photonic Biosensing System," 2024.
• R. Rabbani, "A Wireless Image Sensor for Real-Time, In Vivo Fluorescence Microscopy in Cancer Therapy," M. Anwar and V. Stojanovic, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2024-29, May 2024.
• R. Lageweg, "Berkeley Open MOS dataBase (BOMB): A Dataset for Silicon Technology Representation Learning," V. Stojanovic and K. Hakhamaneshi, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2021-192, Aug. 2021.
• S. Madhvapathy, "Ultrasound Detection with Silicon Microring Resonators," V. Stojanovic and M. C. Wu, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2021-123, May 2021.
• Z. Liu, "Time-interleaved SAR ADC Design Using Berkeley Analog Generator," B. Nikolic and V. Stojanovic, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2020-109, May 2020.
• P. Zarkos, "Design of a sub-Hz Resolution Fully Digital RF Frequency Synthesizer," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2020-17, Jan. 2020.
• C. Adamopoulos, "A Fully Integrated Electronic-Photonic Platform for Label-Free Biosensing," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2020-15, Jan. 2020.
• N. Werblun, "Closing the Analog Design Loop with the Berkeley Analog Generator," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2019-23, May 2019.
• S. Lin, K. Settaluri, and S. Moazeni, "Demonstration of an Optical Chip-to-Chip Link in a 3D Integrated Electronic-Photonic Platform," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2017-193, Dec. 2017.
• V. Stojanovic and L. zhu, "High Speed Data Link," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2017-72, May 2017.
• W. Ho, "Predicting Bad Patents," V. Stojanovic, Ed., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2017-63, May 2017.
• S. Moazeni and V. Stojanovic, "A 40Gb/s PAM4 Transmitter based on a Ring-resonator Optical DAC," EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2017-23, May 2017.
• A. Ou, "Mixed Precision Vector Processors," K. Asanović and V. Stojanovic, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2015-265, Dec. 2015.
• M. Veryanskiy, K. Dillon, K. Saxena, S. Liu, and C. Xu, "Next Generation Memory Interfaces," E. Alon and V. Stojanovic, Eds., EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS-2015-111, May 2015.