VICTOR: Global Redundancy Identification and Test Generation for VLSI Circuits

Ion M. Ratiu

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M83/27

1983

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http://www2.eecs.berkeley.edu/Pubs/TechRpts/1983/Archive/ERL-m-83-27.pdf

Advisors: Donald O. Pederson

BibTeX citation:

@phdthesis{Ratiu:M83/27,
    Author= {Ratiu, Ion M.},
    Title= {VICTOR: Global Redundancy Identification and Test Generation for VLSI Circuits},
    School= {EECS Department, University of California, Berkeley},
    Year= {1983},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1983/149.html},
    Number= {UCB/ERL M83/27},
}

EndNote citation:

%0 Thesis
%A Ratiu, Ion M. 
%T VICTOR: Global Redundancy Identification and Test Generation for VLSI Circuits
%I EECS Department, University of California, Berkeley
%D 1983
%@ UCB/ERL M83/27
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1983/149.html
%F Ratiu:M83/27