Suresh Krishna

EECS Department, University of California, Berkeley

Technical Report No. UCB/CSD-88-411

, 1988

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1988/CSD-88-411.pdf

OPD is a set of four co-ordinated synthesis and analysis tools for the design of optimized VLSI datapath and CPU pipelines. Together, these tools cover a wide range of design tasks, from functional partitioning of the system into pipeline stages through datapath definition and clocking, to the handling of technology-specific constraints. <p>OPD has tools for stage partitioning, clocking scheme calculation, datapath sequencing, and pipeline initiation scheduling. We describe these tools as well as the optimization algorithms they use. We discuss both probabilistic and heuristic optimization techniques. <p>We show how it is possible to rapidly design high-quality pipelines by using OPD with existing CAD tools such as logic synthesizers. We show large as well as small examples taken from VLSI chips and discrete logic machines.

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BibTeX citation:

@techreport{Krishna:CSD-88-411,
    Author= {Krishna, Suresh},
    Title= {OPD: A Toolset for Optimized Pipeline Design},
    Year= {1988},
    Month= {Feb},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1988/5381.html},
    Number= {UCB/CSD-88-411},
    Abstract= {OPD is a set of four co-ordinated synthesis and analysis tools for the design of optimized VLSI datapath and CPU pipelines.  Together, these tools cover a wide range of design tasks, from functional partitioning of the system into pipeline stages through datapath definition and clocking, to the handling of technology-specific constraints. <p>OPD has tools for stage partitioning, clocking scheme calculation, datapath sequencing, and pipeline initiation scheduling. We describe these tools as well as the optimization algorithms they use. We discuss both probabilistic and heuristic optimization techniques. <p>We show how it is possible to rapidly design high-quality pipelines by using OPD with existing CAD tools such as logic synthesizers. We show large as well as small examples taken from VLSI chips and discrete logic machines.},
}

EndNote citation:

%0 Report
%A Krishna, Suresh 
%T OPD: A Toolset for Optimized Pipeline Design
%I EECS Department, University of California, Berkeley
%D 1988
%@ UCB/CSD-88-411
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1988/5381.html
%F Krishna:CSD-88-411