Logic Synthesis for VLSI Design

Richard L. Rudell

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M89/49
April 1989

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/ERL-89-49.pdf

Advisor: Alberto L. Sangiovanni-Vincentelli


BibTeX citation:

@phdthesis{Rudell:M89/49,
    Author = {Rudell, Richard L.},
    Title = {Logic Synthesis for VLSI Design},
    School = {EECS Department, University of California, Berkeley},
    Year = {1989},
    Month = {Apr},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/1223.html},
    Number = {UCB/ERL M89/49}
}

EndNote citation:

%0 Thesis
%A Rudell, Richard L.
%T Logic Synthesis for VLSI Design
%I EECS Department, University of California, Berkeley
%D 1989
%@ UCB/ERL M89/49
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/1223.html
%F Rudell:M89/49