Techniques for Logic Validation of Digital Circuits
Hi-Keung Ma
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M89/140
, 1989
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/ERL-89-140.pdf
Advisors: Alberto L. Sangiovanni-Vincentelli
BibTeX citation:
@phdthesis{Ma:M89/140, Author= {Ma, Hi-Keung}, Title= {Techniques for Logic Validation of Digital Circuits}, School= {EECS Department, University of California, Berkeley}, Year= {1989}, Month= {Dec}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/1376.html}, Number= {UCB/ERL M89/140}, }
EndNote citation:
%0 Thesis %A Ma, Hi-Keung %T Techniques for Logic Validation of Digital Circuits %I EECS Department, University of California, Berkeley %D 1989 %@ UCB/ERL M89/140 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1989/1376.html %F Ma:M89/140