Darren R. Busing

EECS Department, University of California, Berkeley

Technical Report No. UCB/CSD-90-564

, 1990

This report presents the synthesis of a node of the Aquarius IIU multiprocessor system for the execution of Prolog. It includes the design of the prefetcher and cache controllers used in the system, as well as [the] simulation of the system between its main processor, the VLSI-PLM, and the VME bus to which Aquarius IIU nodes are connected. <p> The prefetcher included in this report not only fetches, formats, and supplies instructions, but also maintains the program counter for the VLSI-PLM. It executes some changes-of-control on its own, and receives other change-of-control commands from the VLSI-PLM. The controllers, two each for separate data and instruction caches on each node, cooperate to support a snooping cache-lock state protocol developed by Philip Bitar of the Aquarius group. In particular, this protocol minimizes bus traffic associated with locking blocks. <p> Simulation results are included in this report to verify the correctness of the node design.

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BibTeX citation:

@techreport{Busing:CSD-90-564,
    Author= {Busing, Darren R.},
    Title= {Design and Simulation of the Key Components of the Aquarius IIU System},
    Year= {1990},
    Month= {Jan},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1990/6185.html},
    Number= {UCB/CSD-90-564},
    Abstract= {This report presents the synthesis of a node of the Aquarius IIU multiprocessor system for the execution of Prolog. It includes the design of the prefetcher and cache controllers used in the system, as well as [the] simulation of the system between its main processor, the VLSI-PLM, and the VME bus to which Aquarius IIU nodes are connected. <p> The prefetcher included in this report not only fetches, formats, and supplies instructions, but also maintains the program counter for the VLSI-PLM. It executes some changes-of-control on its own, and receives other change-of-control commands from the VLSI-PLM. The controllers, two each for separate data and instruction caches on each node, cooperate to support a snooping cache-lock state protocol developed by Philip Bitar of the Aquarius group. In particular, this protocol minimizes bus traffic associated with locking blocks. <p> Simulation results are included in this report to verify the correctness of the node design.},
}

EndNote citation:

%0 Report
%A Busing, Darren R. 
%T Design and Simulation of the Key Components of the Aquarius IIU System
%I EECS Department, University of California, Berkeley
%D 1990
%@ UCB/CSD-90-564
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1990/6185.html
%F Busing:CSD-90-564