Techniques for Test Generation and Verification of VLSI Sequential Circuits
A. Ghosh
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M91/73
, 1991
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1991/ERL-91-73.pdf
BibTeX citation:
@techreport{Ghosh:M91/73, Author= {Ghosh, A.}, Title= {Techniques for Test Generation and Verification of VLSI Sequential Circuits}, Year= {1991}, Month= {Sep}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1991/1799.html}, Number= {UCB/ERL M91/73}, }
EndNote citation:
%0 Report %A Ghosh, A. %T Techniques for Test Generation and Verification of VLSI Sequential Circuits %I EECS Department, University of California, Berkeley %D 1991 %@ UCB/ERL M91/73 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1991/1799.html %F Ghosh:M91/73