Optimum Partitioning of Analog and Digital Circuitry in Mixed-Signal Circuits for Signal Processing

Ken A. Nishimura

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M93/67
July 1993

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/ERL-93-67.pdf

Advances in digital signal processing (DSP) technologies have resulted in an increased proportion of signal processing tasks being performed in the digital domain. However, increased interest in low-power circuitry and economic factors have placed pressure to minimize power dissipation and silicon area in such circuits. An examination of the relative strengths and weaknesses of analog versus digital circuits is made in this dissertation. Comparisons of power dissipation and silicon area based on fundamental limits and practical considerations as a function of signal bandwidth and dynamic range for which analog processing is more efficient than digital processing. A monolithic analog video comb filter has been fabricated in 1.2-um CMOS technology to demonstrate the area and power advantages of analog processing for video-rate signals. This chip, which dissipates 170 mW and consumes 11.7 mm^2, requires only a single 4f(sc) clock and reference current and no adjustments. The chip which uses a fully differential architecture, achieves a dynamic range of 51 dB and a comb notch depth of > 28 dB. Fixed patter noise is less than 55 dB below full scale. Circuit techniques to mitigate the effects of large parasitic capacitances are introduced. This dissertation shows that considering only power and area of the actual processing circuitry, signal processing tasks with modest (<60dB) dynamic range requirements are more efficiently undertaken with analog processing compared to equivalent digital processing techniques. This result is derived from an examination of fundamental limits and demonstrated using numerical examples representative of a 1 um technology with a 3.3V supply. Specifically, sampled data analog processing of NTSC video signals is achievable using standard CMOS technologies, allowing the use of such techniques within a larger mixed-signal integrated circuit.

Advisor: Paul R. Gray

BibTeX citation:

@phdthesis{Nishimura:M93/67,
    Author = {Nishimura, Ken A.},
    Title = {Optimum Partitioning of Analog and Digital Circuitry in Mixed-Signal Circuits for Signal Processing},
    School = {EECS Department, University of California, Berkeley},
    Year = {1993},
    Month = {Jul},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/2424.html},
    Number = {UCB/ERL M93/67},
    Abstract = {Advances in digital signal processing (DSP) technologies have resulted in an increased proportion of signal processing tasks being performed in the digital domain.  However, increased interest in low-power circuitry and economic factors have placed pressure to minimize power dissipation and silicon area in such circuits.  An examination of the relative strengths and weaknesses of analog versus digital circuits is made in this dissertation.  Comparisons of power dissipation and silicon area based on fundamental limits and practical considerations as a function of signal bandwidth and dynamic range for which analog processing is more efficient than digital processing.  A monolithic analog video comb filter has been fabricated in 1.2-um CMOS technology to demonstrate the area and power advantages of analog processing for video-rate signals.  This chip, which dissipates 170 mW and consumes 11.7 mm^2, requires only a single 4f(sc) clock and reference current and no adjustments.  The chip which uses a fully differential architecture, achieves a dynamic range of 51 dB and a comb notch depth of > 28 dB.  Fixed patter noise is less than 55 dB below full scale.  Circuit techniques to mitigate the effects of large parasitic capacitances are introduced.  This dissertation shows that considering only power and area of the actual processing circuitry, signal processing tasks with modest (<60dB) dynamic range requirements are more efficiently undertaken with analog processing compared to equivalent digital processing techniques.  This result is derived from an examination of fundamental limits and demonstrated using numerical examples representative of a 1 um technology with a 3.3V supply. Specifically, sampled data analog processing of NTSC video signals is achievable using standard CMOS technologies, allowing the use of such techniques within a larger mixed-signal integrated circuit.}
}

EndNote citation:

%0 Thesis
%A Nishimura, Ken A.
%T Optimum Partitioning of Analog and Digital Circuitry in Mixed-Signal Circuits for Signal Processing
%I EECS Department, University of California, Berkeley
%D 1993
%@ UCB/ERL M93/67
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1993/2424.html
%F Nishimura:M93/67