A Comparative Approach to Processor Verification Using Symbolic Model Checking
N. Ishiura and Robert K. Brayton
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M94/59
, 1994
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/ERL-94-59.pdf
BibTeX citation:
@techreport{Ishiura:M94/59, Author= {Ishiura, N. and Brayton, Robert K.}, Title= {A Comparative Approach to Processor Verification Using Symbolic Model Checking}, Year= {1994}, Month= {Aug}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/2601.html}, Number= {UCB/ERL M94/59}, }
EndNote citation:
%0 Report %A Ishiura, N. %A Brayton, Robert K. %T A Comparative Approach to Processor Verification Using Symbolic Model Checking %I EECS Department, University of California, Berkeley %D 1994 %@ UCB/ERL M94/59 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1994/2601.html %F Ishiura:M94/59