A Top-Down Constraint-Driven Design Methodology for Analog Integrated Circuits

C-H. Chang

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M95/21

1995

This publication is archived. It is kept only for reference purposes, so it is no longer being updated and may not meet accessibility standards. If you need this content in a different format, please email webteam@eecs.berkeley.edu.

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/Archive/ERL-95-21.pdf

BibTeX citation:

@techreport{Chang:M95/21,
    Author= {Chang, C-H.},
    Title= {A Top-Down Constraint-Driven Design Methodology for Analog Integrated Circuits},
    Year= {1995},
    Month= {Apr},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2746.html},
    Number= {UCB/ERL M95/21},
}

EndNote citation:

%0 Report
%A Chang, C-H. 
%T A Top-Down Constraint-Driven Design Methodology for Analog Integrated Circuits
%I EECS Department, University of California, Berkeley
%D 1995
%@ UCB/ERL M95/21
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2746.html
%F Chang:M95/21