Low-Power Low-Voltage Analog-to-Digital Conversion Techniques Using Pipelined Architectures

Thomas B. Cho

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M95/23

1995

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http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/Archive/ERL-95-23.pdf

Advisors: Paul R. Gray

BibTeX citation:

@phdthesis{Cho:M95/23,
    Author= {Cho, Thomas B.},
    Title= {Low-Power Low-Voltage Analog-to-Digital Conversion Techniques Using Pipelined Architectures},
    School= {EECS Department, University of California, Berkeley},
    Year= {1995},
    Month= {Apr},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2748.html},
    Number= {UCB/ERL M95/23},
}

EndNote citation:

%0 Thesis
%A Cho, Thomas B. 
%T Low-Power Low-Voltage Analog-to-Digital Conversion Techniques Using Pipelined Architectures
%I EECS Department, University of California, Berkeley
%D 1995
%@ UCB/ERL M95/23
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2748.html
%F Cho:M95/23