CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory
S. Fang
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M95/98
1995
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http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/Archive/ERL-95-98.pdf
BibTeX citation:
@techreport{Fang:M95/98,
Author= {Fang, S.},
Title= {CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory},
Year= {1995},
Month= {Dec},
Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2915.html},
Number= {UCB/ERL M95/98},
}
EndNote citation:
%0 Report %A Fang, S. %T CMOS Baseline Process in the UC Berkeley Microfabrication Laboratory %I EECS Department, University of California, Berkeley %D 1995 %@ UCB/ERL M95/98 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1995/2915.html %F Fang:M95/98