Formal Analysis of Synchronous Circuits

Thomas R. Shiple

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M96/76
December 1996

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1996/ERL-96-76.pdf

Advisor: Alberto L. Sangiovanni-Vincentelli


BibTeX citation:

@phdthesis{Shiple:M96/76,
    Author = {Shiple, Thomas R.},
    Title = {Formal Analysis of Synchronous Circuits},
    School = {EECS Department, University of California, Berkeley},
    Year = {1996},
    Month = {Dec},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1996/3126.html},
    Number = {UCB/ERL M96/76}
}

EndNote citation:

%0 Thesis
%A Shiple, Thomas R.
%T Formal Analysis of Synchronous Circuits
%I EECS Department, University of California, Berkeley
%D 1996
%@ UCB/ERL M96/76
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1996/3126.html
%F Shiple:M96/76