Krste Asanović and James Beck

EECS Department, University of California, Berkeley

Technical Report No. UCB/CSD-97-931

, 1997

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1997/CSD-97-931.pdf

T0 (Torrent-0) is a single-chip fixed-point vector microprocessor designed for multimedia, human-interface, neural network, and other digital signal processing tasks. T0 includes a MIPS-II compatible 32-bit integer RISC core, a 1 Kbyte instruction cache, a high performance fixed-point vector coprocessor, a 128-bit wide external memory interface, and a byte-serial host interface. T0 implements the Torrent ISA described in a separate "Torrent Architecture Manual" technical report. This manual contains detailed information on the T0 vector microprocessor, including information required to build T0 into a system, instruction execution timings, and information on low level T0 software interfaces required for operating system support.


BibTeX citation:

@techreport{Asanović:CSD-97-931,
    Author= {Asanović, Krste and Beck, James},
    Title= {T0 Engineering Data},
    Year= {1997},
    Month= {Jan},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1997/5411.html},
    Number= {UCB/CSD-97-931},
    Abstract= {T0 (Torrent-0) is a single-chip fixed-point vector microprocessor designed for multimedia, human-interface, neural network, and other digital signal processing tasks. T0 includes a MIPS-II compatible 32-bit integer RISC core, a 1 Kbyte instruction cache, a high performance fixed-point vector coprocessor, a 128-bit wide external memory interface, and a byte-serial host interface. T0 implements the Torrent ISA described in a separate "Torrent Architecture Manual" technical report.  This manual contains detailed information on the T0 vector microprocessor, including information required to build T0 into a system, instruction execution timings, and information on low level T0 software interfaces required for operating system support.},
}

EndNote citation:

%0 Report
%A Asanović, Krste 
%A Beck, James 
%T T0 Engineering Data
%I EECS Department, University of California, Berkeley
%D 1997
%@ UCB/CSD-97-931
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1997/5411.html
%F Asanović:CSD-97-931