W. Liu and X. Jin and J. Chen and M-C. Jeng and Z. Liu and Y. Cheng and K. Chen and M. Chan and K. Hui and J. Huang and R. Tu and P.K. Ko and Chenming Hu

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M98/51

, 1998

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/ERL-98-51.pdf

BSIM3v3 is the latest industry-standard MOSFET model for deep-submicron digital and analog circuit designs from the BSIM Group at the University of California at Berkeley. BSIM3v3.2 is based on its predecessor, BSIM3v3.1. Its many improvements and enhancements include

* A new intrinsic capacitance model (the Charge Thickness Model), considering the finite charge layer thickness determined by quantum effect, is introduced as capMod 3 It is very accurate in all operating regions.

* Modeling of C-V characteristics at the weak-to-inversion transition is improved.

* The T(ox) dependence is added into the threshold voltage model.

* The flat-band voltage is added as a new model parameter to accurately model MOSFET's with different gate materials.

* Substrate current dependence on the channel length is improved.

* The non-quasi-static (NQS) model is restructured to improve the model accuracy and simulation efficiency. NQS is added in the pole-zero analysis.

* The temperature dependence is added to the diode junction capacitance model.

* The DC junction diode model now supports a resistance-free diode model and a current-limiting feature.

* Option of using C-V inversion charge equations of capMod 0, 1, 2 or 3 to calculate the thermal noise when noiMod == 2 or 4 is added.

* The small negative capacitance of C(gs) and C(gd) in the accumulation-depletion regions is eliminated.

* A separate set of length/width-dependence parameters is introduced in the C-V model to better fit the capacitance data.

* Parameter checking is added to avoid bad values for certain parameters.

* Known bugs are fixed.

Meticulous care has been taken to accomplish the above model enhancements with high levels of accuracy and fast SPICE convergence properties. In addition, every effort has been made to maintain the backward compatibility with the previous version except for the following change:

Re-implementation of NQS model; Junction diode I-V model; Using C-V Q(inv) for BSIM3 thermal noise evaluation; Zero-bias V(fb) for capMod = 1 and 2; Removing P(d) and P(s) clamps; Using Leffcv for AbulkCVfactor; Bug fixes (Refer to "BSIM3v3.2 Model Enhancements" at http://www-device.eecs.berkeley.edu/~bsim3).

---

BibTeX citation:

@techreport{Liu:M98/51,
    Author= {Liu, W. and Jin, X. and Chen, J. and Jeng, M-C. and Liu, Z. and Cheng, Y. and Chen, K. and Chan, M. and Hui, K. and Huang, J. and Tu, R. and Ko, P.K. and Hu, Chenming},
    Title= {BSIM 3v3.2 MOSFET Model Users' Manual},
    Year= {1998},
    Month= {Aug},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/3486.html},
    Number= {UCB/ERL M98/51},
    Abstract= {BSIM3v3 is the latest industry-standard MOSFET model for
deep-submicron digital and analog circuit designs from the BSIM
Group at the University of California at Berkeley. BSIM3v3.2 is
based on its predecessor, BSIM3v3.1. Its many improvements and
enhancements include

    *   A new intrinsic capacitance model (the Charge Thickness
        Model), considering the finite charge layer thickness
        determined by quantum effect, is introduced as capMod 3 It
        is very accurate in all operating regions.

    *   Modeling of C-V characteristics at the weak-to-inversion
        transition is improved. 

    *   The T(ox) dependence is added into the threshold voltage model.

    *   The flat-band voltage is added as a new model parameter to
        accurately model MOSFET's with different gate materials.

    *   Substrate current dependence on the channel length is improved.

    *   The non-quasi-static (NQS) model is restructured to improve
        the model accuracy and simulation efficiency. NQS is added in
        the pole-zero analysis. 

    *   The temperature dependence is added to the diode junction
        capacitance model. 

    *   The DC junction diode model now supports a resistance-free
        diode model and a current-limiting feature.

    *   Option of using C-V inversion charge equations of capMod 0,
        1, 2 or 3 to calculate the thermal noise when noiMod ==
        2 or 4 is added.

    *   The small negative capacitance of C(gs) and C(gd) in the
        accumulation-depletion regions is eliminated.

    *   A separate set of length/width-dependence parameters is
        introduced in the C-V model to better fit the capacitance
        data.

    *   Parameter checking is added to avoid bad values for certain
        parameters.

    *   Known bugs are fixed.

Meticulous care has been taken to accomplish the above model
enhancements with high levels of accuracy and fast SPICE convergence
properties. In addition, every effort has been made to maintain
the backward compatibility with the previous version except for
the following change:

    Re-implementation of NQS model;
    Junction diode I-V model;
    Using C-V Q(inv) for BSIM3 thermal noise evaluation;
    Zero-bias V(fb) for capMod = 1 and 2;
    Removing P(d) and P(s) clamps;
    Using Leffcv for AbulkCVfactor;
    Bug fixes (Refer to "BSIM3v3.2 Model Enhancements" at http://www-device.eecs.berkeley.edu/~bsim3).},
}

EndNote citation:

%0 Report
%A Liu, W. 
%A Jin, X. 
%A Chen, J. 
%A Jeng, M-C. 
%A Liu, Z. 
%A Cheng, Y. 
%A Chen, K. 
%A Chan, M. 
%A Hui, K. 
%A Huang, J. 
%A Tu, R. 
%A Ko, P.K. 
%A Hu, Chenming 
%T BSIM 3v3.2 MOSFET Model Users' Manual
%I EECS Department, University of California, Berkeley
%D 1998
%@ UCB/ERL M98/51
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/3486.html
%F Liu:M98/51