A Layout and Design Methodology for Deep Sub-micron Applications Using Networks of PLAs

S.P. Khatri, Robert K. Brayton and Alberto L. Sangiovanni-Vincentelli

EECS Department
University of California, Berkeley
Technical Report No. UCB/ERL M98/68
May 1998

http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/ERL-98-68.pdf

BibTeX citation:

@techreport{Khatri:M98/68,
    Author = {Khatri, S.P. and Brayton, Robert K. and Sangiovanni-Vincentelli, Alberto L.},
    Title = {A Layout and Design Methodology for Deep Sub-micron Applications Using Networks of PLAs},
    Institution = {EECS Department, University of California, Berkeley},
    Year = {1998},
    Month = {May},
    URL = {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/3539.html},
    Number = {UCB/ERL M98/68}
}

EndNote citation:

%0 Report
%A Khatri, S.P.
%A Brayton, Robert K.
%A Sangiovanni-Vincentelli, Alberto L.
%T A Layout and Design Methodology for Deep Sub-micron Applications Using Networks of PLAs
%I EECS Department, University of California, Berkeley
%D 1998
%@ UCB/ERL M98/68
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1998/3539.html
%F Khatri:M98/68