Timing Analysis and Optimization for High-Performance Digital Circuits
Yuji Kukimoto
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M99/42
, 1999
http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/ERL-99-42.pdf
Advisors: Robert K. Brayton
BibTeX citation:
@phdthesis{Kukimoto:M99/42, Author= {Kukimoto, Yuji}, Title= {Timing Analysis and Optimization for High-Performance Digital Circuits}, School= {EECS Department, University of California, Berkeley}, Year= {1999}, Month= {Sep}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/3722.html}, Number= {UCB/ERL M99/42}, }
EndNote citation:
%0 Thesis %A Kukimoto, Yuji %T Timing Analysis and Optimization for High-Performance Digital Circuits %I EECS Department, University of California, Berkeley %D 1999 %@ UCB/ERL M99/42 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/1999/3722.html %F Kukimoto:M99/42