CMOS Baseline Process in the UC Berkeley Microfabrication Lab Report II
L. Voros
EECS Department, University of California, Berkeley
Technical Report No. UCB/ERL M00/61
2000
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http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/Archive/ERL-00-61.pdf
BibTeX citation:
@techreport{Voros:M00/61,
Author= {Voros, L.},
Title= {CMOS Baseline Process in the UC Berkeley Microfabrication Lab Report II},
Year= {2000},
Month= {Dec},
Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/3924.html},
Number= {UCB/ERL M00/61},
}
EndNote citation:
%0 Report %A Voros, L. %T CMOS Baseline Process in the UC Berkeley Microfabrication Lab Report II %I EECS Department, University of California, Berkeley %D 2000 %@ UCB/ERL M00/61 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2000/3924.html %F Voros:M00/61