Advanced Gate Stack Materials and Processes for Sub-100nm CMOS Appliciations

Qiang Lu

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M03/4

2002

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http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/Archive/ERL-03-4.pdf

Advisors: Chenming Hu

BibTeX citation:

@phdthesis{Lu:M03/4,
    Author= {Lu, Qiang},
    Title= {Advanced Gate Stack Materials and Processes for Sub-100nm CMOS Appliciations},
    School= {EECS Department, University of California, Berkeley},
    Year= {2002},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/4052.html},
    Number= {UCB/ERL M03/4},
}

EndNote citation:

%0 Thesis
%A Lu, Qiang 
%T Advanced Gate Stack Materials and Processes for Sub-100nm CMOS Appliciations
%I EECS Department, University of California, Berkeley
%D 2002
%@ UCB/ERL M03/4
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2002/4052.html
%F Lu:M03/4