Design Flow for Deep Sub-Micron Integrated Circuits

Fan Mo

EECS Department, University of California, Berkeley

Technical Report No. UCB/ERL M04/9

2004

This publication is archived. It is kept only for reference purposes, so it is no longer being updated and may not meet accessibility standards. If you need this content in a different format, please email webteam@eecs.berkeley.edu.

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2004/Archive/ERL-04-9.pdf

Advisors: Robert K. Brayton

BibTeX citation:

@phdthesis{Mo:M04/9,
    Author= {Mo, Fan},
    Title= {Design Flow for Deep Sub-Micron Integrated Circuits},
    School= {EECS Department, University of California, Berkeley},
    Year= {2004},
    Month= {Jan},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2004/4208.html},
    Number= {UCB/ERL M04/9},
}

EndNote citation:

%0 Thesis
%A Mo, Fan 
%T Design Flow for Deep Sub-Micron Integrated Circuits
%I EECS Department, University of California, Berkeley
%D 2004
%@ UCB/ERL M04/9
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2004/4208.html
%F Mo:M04/9