Andrew Christopher Mihal

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2006-145

November 10, 2006

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-145.pdf

The now-common phrase "the processor is the NAND gate of the future" begs the questions: "What kind of processor?" and "How to program them?" For many the presumption is that the natural building block is a common and successful general-purpose RISC processor and that programming will be done in C. Numerous programmable multiprocessor systems of this type have been built, but they are notoriously hard to program. What makes programming hard? One proposal is that poor methodologies for modeling and implementing concurrency are to blame. Embedded applications have multiple styles of concurrency on several levels of granularity. In order to meet performance goals, all of this concurrency must be considered in the implementation. C does not provide good abstractions for concurrency. This forces designers to use ad hoc techniques to divide the application into a set of interacting C programs that exploit the architecture's capabilities. This manual approach is slow and error-prone, and it inhibits effective design-space exploration. Domain-specific languages are successful at modeling concurrency more formally. This improves productivity, but it also exposes a more fundamental problem. For many programmable multiprocessors, there is an inherent mismatch between the concurrency capabilities of the architecture and the concurrency requirements of the application. This problem is the concurrency implementation gap. If programmable processors are to find success in future systems, designers must rethink how they design architectures in addition to the way they program them. This dissertation takes a three-part approach to this challenge. Designers use separate abstractions for modeling applications, capturing the capabilities of architectures, and mapping applications onto architectures. Models of computations and actor-oriented design provide a mechanism for correctly modeling concurrent applications. The Sub-RISC paradigm provides efficient, cost-effective architectures and exports their capabilities. A disciplined mapping methodology leads to correct implementations and enables effective design space exploration. With this approach, designers can solve the concurrency implementation gap and realize the benefits of programmable multiprocessors.

Advisors: Kurt Keutzer

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BibTeX citation:

@phdthesis{Mihal:EECS-2006-145,
    Author= {Mihal, Andrew Christopher},
    Title= {Deploying Concurrent Applications on Heterogeneous Multiprocessors},
    School= {EECS Department, University of California, Berkeley},
    Year= {2006},
    Month= {Nov},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-145.html},
    Number= {UCB/EECS-2006-145},
    Abstract= {The now-common phrase "the processor is the NAND gate of the future" begs the questions: "What kind of processor?" and "How to program them?" For many the presumption is that the natural building block is a common and successful general-purpose RISC processor and that programming will be done in C. Numerous programmable multiprocessor systems of this type have been built, but they are notoriously hard to program.
What makes programming hard? One proposal is that poor methodologies for modeling and implementing concurrency are to blame. Embedded applications have multiple styles of concurrency on several levels of granularity. In order to meet performance goals, all of this concurrency must be considered in the implementation. C does not provide good abstractions for concurrency. This forces designers to use ad hoc techniques to divide the application into a set of interacting C programs that exploit the architecture's capabilities. This manual approach is slow and error-prone, and it inhibits effective design-space exploration.
Domain-specific languages are successful at modeling concurrency more formally. This improves productivity, but it also exposes a more fundamental problem. For many programmable multiprocessors, there is an inherent mismatch between the concurrency capabilities of the architecture and the concurrency requirements of the application. This problem is the concurrency implementation gap. If programmable processors are to find success in future systems, designers must rethink how they design architectures in addition to the way they program them.
This dissertation takes a three-part approach to this challenge. Designers use separate abstractions for modeling applications, capturing the capabilities of architectures, and mapping applications onto architectures. Models of computations and actor-oriented design provide a mechanism for correctly modeling concurrent applications. The Sub-RISC paradigm provides efficient, cost-effective architectures and exports their capabilities. A disciplined mapping methodology leads to correct implementations and enables effective design space exploration. With this approach, designers can solve the concurrency implementation gap and realize the benefits of programmable multiprocessors.},
}

EndNote citation:

%0 Thesis
%A Mihal, Andrew Christopher 
%T Deploying Concurrent Applications on Heterogeneous Multiprocessors
%I EECS Department, University of California, Berkeley
%D 2006
%8 November 10
%@ UCB/EECS-2006-145
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-145.html
%F Mihal:EECS-2006-145