Digital Pulse-Width Modulation Control in Power Electronic Circuits: Theory and Applications

Angel Vladimirov Peterchev and Seth R. Sanders

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2006-22

March 13, 2006

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-22.pdf

This thesis develops digital pulse-width-modulation (DPWM) control of switching power converters. A target application is microprocessor voltage regulation which requires high efficiency and tight output load-line control. A general framework for load-line control is developed, which encompasses relevant capacitor technologies, such as electrolytics and ceramics. It is shown that load-current feedforward can overcome the limited bandwidth of conventional feedback load-line control. The size of the output capacitor is then determined solely by transient and switching-ripple considerations, which are derived. This work enables microprocessor voltage-regulator implementations using a small number of ceramic output capacitors, while running at sub-megahertz switching frequencies.

Efficient DPWM controller implementations are discussed, addressing system stability issues unique to digital control. The existence of limit cycles is analyzed, as well as conditions for their elimination. Digital dither is introduced as a method to increase the effective DPWM resolution, thus preventing limit cycling, and enabling low-power, small-area DPWM implementations. A method for direct control of synchronous rectifiers as a function of the load current is developed. The function relating the synchronous-rectifer timing to the load current is optimized on-line with a perturbation-based power-loss-minimizing algorithm. This approach provides fast synchronous-rectifer adjustment, robustness to disturbances, and the capability to simultaneously optimize multiple parameters. It also accomplishes an automatic, optimal transition to discontinuous-conduction mode at light load, thus improving converter effciency. Efficiency is further enhanced by imposing a minimum duty-ratio limit to effect pulse-skipping at very light load. Three experimental buck converters are developed to illustrate different aspects of this work. Simulations are used to further corroborate the results.

Advisors: Seth R. Sanders

BibTeX citation:

@phdthesis{Peterchev:EECS-2006-22,
    Author= {Peterchev, Angel Vladimirov and Sanders, Seth R.},
    Title= {Digital Pulse-Width Modulation Control in Power Electronic Circuits: Theory and Applications},
    School= {EECS Department, University of California, Berkeley},
    Year= {2006},
    Month= {Mar},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-22.html},
    Number= {UCB/EECS-2006-22},
    Abstract= {This thesis develops digital pulse-width-modulation (DPWM) control of switching power converters.  A target application is microprocessor voltage regulation which requires high efficiency and tight output load-line control. A general framework for load-line control is developed, which encompasses relevant capacitor technologies, such as electrolytics and ceramics. It is shown that load-current feedforward can overcome the limited bandwidth of conventional feedback load-line control. The size of the output capacitor is then determined solely by transient and switching-ripple considerations, which are derived. This work enables microprocessor voltage-regulator implementations using a small number of ceramic output capacitors, while running at sub-megahertz switching frequencies.

Efficient DPWM controller implementations are discussed, addressing system stability issues unique to digital control. The existence of limit cycles is analyzed, as well as conditions for their elimination. Digital dither is introduced as a method to increase the effective DPWM resolution, thus preventing limit cycling, and enabling low-power, small-area DPWM implementations.
A method for direct control of synchronous rectifiers as a function of the load current is developed. The function relating the synchronous-rectifer timing to the load current is optimized on-line with a perturbation-based power-loss-minimizing algorithm. This approach provides fast synchronous-rectifer adjustment, robustness to disturbances, and the capability to simultaneously optimize multiple parameters.  It also accomplishes an automatic, optimal transition to discontinuous-conduction mode at light load, thus improving converter effciency. Efficiency is further enhanced by imposing a minimum duty-ratio limit to effect pulse-skipping at very light load.  Three experimental buck converters are developed to illustrate different aspects of this work. Simulations are used to further corroborate the results.},
}

EndNote citation:

%0 Thesis
%A Peterchev, Angel Vladimirov 
%A Sanders, Seth R. 
%T Digital Pulse-Width Modulation Control in Power Electronic Circuits: Theory and Applications
%I EECS Department, University of California, Berkeley
%D 2006
%8 March 13
%@ UCB/EECS-2006-22
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-22.html
%F Peterchev:EECS-2006-22