Yunsup Lee

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2011-129

December 12, 2011

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2011/EECS-2011-129.pdf

We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We introduce Maven, a new VT microarchitecture based on the traditional vector-SIMD microarchitecture, that is considerably simpler to implement and easier to program than previous VT designs. Using an extensive design-space exploration of full VLSI implementations of many accelerator design points, we evaluate the varying tradeoffs between programmability and implementation efficiency among the MIMD, vector-SIMD, and VT patterns on a workload of compiled microbenchmarks and application kernels. We find the vector cores provide greater efficiency than the MIMD cores, even on fairly irregular kernels. Our results suggest that the Maven VT microarchitecture is superior to the traditional vector-SIMD architecture, providing both greater efficiency and easier programmability.

Advisors: Krste Asanović

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BibTeX citation:

@mastersthesis{Lee:EECS-2011-129,
    Author= {Lee, Yunsup},
    Title= {Efficient VLSI Implementations of Vector-Thread Architectures},
    School= {EECS Department, University of California, Berkeley},
    Year= {2011},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2011/EECS-2011-129.html},
    Number= {UCB/EECS-2011-129},
    Abstract= {We present a taxonomy and modular implementation approach for data-parallel accelerators, including the MIMD, vector-SIMD, subword-SIMD, SIMT, and vector-thread (VT) architectural design patterns. We introduce Maven, a new VT microarchitecture based on the traditional vector-SIMD microarchitecture, that is considerably simpler to implement and easier to program than previous VT designs. Using an extensive design-space exploration of full VLSI implementations of many accelerator design points, we evaluate the varying tradeoffs between programmability and implementation efficiency among the MIMD, vector-SIMD, and VT patterns on a workload of compiled microbenchmarks and application kernels. We find the vector cores provide greater efficiency than the MIMD cores, even on fairly irregular kernels. Our results suggest that the Maven VT microarchitecture is superior to the traditional vector-SIMD architecture, providing both greater efficiency and easier programmability.},
}

EndNote citation:

%0 Thesis
%A Lee, Yunsup 
%T Efficient VLSI Implementations of Vector-Thread Architectures
%I EECS Department, University of California, Berkeley
%D 2011
%8 December 12
%@ UCB/EECS-2011-129
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2011/EECS-2011-129.html
%F Lee:EECS-2011-129