Instruction Sets Should Be Free: The Case For RISC-V
Krste Asanović and David A. Patterson
EECS Department, University of California, Berkeley
Technical Report No. UCB/EECS-2014-146
August 6, 2014
http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-146.pdf
The increasing popularity of systems on a chip, where processors are just a small fraction of the design, calls into question why one of the most important interfaces is proprietary. We argue that: <p> * There is no good technical reason not to have free, open instruction sets just as we have free, open networking standards and free, open operating systems. <p> * The most likely first targets for a free, open instruction set are systems on a chip for the Internet of Things, which have low cost and power demands, and for Warehouse Scale Computers, which could benefit from viable alternatives to the 80x86 instruction set <p> * The best architectural style for a free, open instruction set is RISC. <p> * Given the time it takes to design an instruction set, it makes more sense to adopt an existing RISC free, open instruction set than to design a new one from scratch. <p> * Among the existing RISC free, open instruction sets, RISC-V is the best and safest choice.
BibTeX citation:
@techreport{Asanović:EECS-2014-146, Author= {Asanović, Krste and Patterson, David A.}, Title= {Instruction Sets Should Be Free: The Case For RISC-V}, Year= {2014}, Month= {Aug}, Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-146.html}, Number= {UCB/EECS-2014-146}, Abstract= {The increasing popularity of systems on a chip, where processors are just a small fraction of the design, calls into question why one of the most important interfaces is proprietary. We argue that: <p> * There is no good technical reason not to have free, open instruction sets just as we have free, open networking standards and free, open operating systems. <p> * The most likely first targets for a free, open instruction set are systems on a chip for the Internet of Things, which have low cost and power demands, and for Warehouse Scale Computers, which could benefit from viable alternatives to the 80x86 instruction set <p> * The best architectural style for a free, open instruction set is RISC. <p> * Given the time it takes to design an instruction set, it makes more sense to adopt an existing RISC free, open instruction set than to design a new one from scratch. <p> * Among the existing RISC free, open instruction sets, RISC-V is the best and safest choice.}, }
EndNote citation:
%0 Report %A Asanović, Krste %A Patterson, David A. %T Instruction Sets Should Be Free: The Case For RISC-V %I EECS Department, University of California, Berkeley %D 2014 %8 August 6 %@ UCB/EECS-2014-146 %U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-146.html %F Asanović:EECS-2014-146