Wai Son Ko

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2016-172

December 1, 2016

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-172.pdf

Advancement in transistor scaling and integration technology has given electronics tremendous amount of computational power. Yet, extending integration to include photonics can augment computation with the ability to create and manipulate light. Such tight electronic-photonic integration can create exciting new opportunities, such as high speed, low energy on-chip optical interconnects, advanced optical sensors, and other unforeseen applications.

Electronic-photonic integration using traditional integration methods happens to be a difficult task, however. Photonic components, such as lasers and light emitting diodes, are typically made with III-V semiconductors since silicon, the material that electronics are built on, lacks light generation ability due to its indirect band gap. Simply combining III-V materials with silicon using conventional thin film growth technique often results in nonfunctional or subpar devices because the lattice spacing mismatch between III-V and silicon creates performance degrading defects. This problem, nevertheless, can be mitigated with nanostructure growth. Thanks to the nanoscale footprint, strain from lattice mismatch can fully relax, allowing monolithic integration of high quality III-V materials onto silicon as building blocks for high performance optoelectronic devices.

In this dissertation, a variety of optoelectronic devices integrated onto silicon using InGaAs and InP nanopillars will be presented. High speed nano light emitting diode (nano-LED) capable of generating stimulated emission is demonstrated. Observing stimulated emission from such a nano-LED marks a great milestone towards realizing electrically driven laser on silicon. And when the nano-LED is under reverse bias, the device acts as a highly efficient avalanche photodiode yielding 100x gain at as little as 1 V reverse bias. Under solar illumination, the device shows angle insensitive response and high photovoltaic efficiency of 19.6%, the highest ever reported for an InP nanostructure solar cell grown on low cost silicon substrate. Furthermore, a more sophisticated, highly sensitive bipolar junction phototransistor is made on silicon as an integrated detector to enable low energy photonic interface to logic circuit. And to validate nanopillar as viable means to building photonic integrated circuit, a proof of concept photonic data link is built and demonstrated on silicon. With nanopillar optoelectronics, tight electronic-photonic integration is becoming a reality, opening the door to a new generation of convergent electronic devices with far-reaching photonic capabilities.

Advisors: Constance Chang-Hasnain

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BibTeX citation:

@phdthesis{Ko:EECS-2016-172,
    Author= {Ko, Wai Son},
    Title= {Photonic Integrated Circuits Using III-V Nanopillars Grown on Silicon},
    School= {EECS Department, University of California, Berkeley},
    Year= {2016},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-172.html},
    Number= {UCB/EECS-2016-172},
    Abstract= {Advancement in transistor scaling and integration technology has given electronics tremendous amount of computational power.  Yet, extending integration to include photonics can augment computation with the ability to create and manipulate light.  Such tight electronic-photonic integration can create exciting new opportunities, such as high speed, low energy on-chip optical interconnects, advanced optical sensors, and other unforeseen applications.  

Electronic-photonic integration using traditional integration methods happens to be a difficult task, however.  Photonic components, such as lasers and light emitting diodes, are typically made with III-V semiconductors since silicon, the material that electronics are built on, lacks light generation ability due to its indirect band gap.  Simply combining III-V materials with silicon using conventional thin film growth technique often results in nonfunctional or subpar devices because the lattice spacing mismatch between III-V and silicon creates performance degrading defects.  This problem, nevertheless, can be mitigated with nanostructure growth.  Thanks to the nanoscale footprint, strain from lattice mismatch can fully relax, allowing monolithic integration of high quality III-V materials onto silicon as building blocks for high performance optoelectronic devices.  

In this dissertation, a variety of optoelectronic devices integrated onto silicon using InGaAs and InP nanopillars will be presented.  High speed nano light emitting diode (nano-LED) capable of generating stimulated emission is demonstrated.  Observing stimulated emission from such a nano-LED marks a great milestone towards realizing electrically driven laser on silicon.  And when the nano-LED is under reverse bias, the device acts as a highly efficient avalanche photodiode yielding 100x gain at as little as 1 V reverse bias.  Under solar illumination, the device shows angle insensitive response and high photovoltaic efficiency of 19.6%, the highest ever reported for an InP nanostructure solar cell grown on low cost silicon substrate.  Furthermore, a more sophisticated, highly sensitive bipolar junction phototransistor is made on silicon as an integrated detector to enable low energy photonic interface to logic circuit.  And to validate nanopillar as viable means to building photonic integrated circuit, a proof of concept photonic data link is built and demonstrated on silicon.  With nanopillar optoelectronics, tight electronic-photonic integration is becoming a reality, opening the door to a new generation of convergent electronic devices with far-reaching photonic capabilities.},
}

EndNote citation:

%0 Thesis
%A Ko, Wai Son 
%T Photonic Integrated Circuits Using III-V Nanopillars Grown on Silicon
%I EECS Department, University of California, Berkeley
%D 2016
%8 December 1
%@ UCB/EECS-2016-172
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-172.html
%F Ko:EECS-2016-172