Nathaniel Mailoa

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2016-77

May 13, 2016

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-77.pdf

The Aggregator Module (AM) is one of the 3 modules in the Octopus-Mimetic Neural Implant (OMNI) Brain-Machine Interface system. The AM is responsible for communication between the Control Module (CM) and the Neuromodulator Modules (NMs) as well as power distribution to the NMs. The current prototype of the AM is implemented in PCB and consumes 1.6mW. This project aims to move the design to an ASIC to reduce power consumption and area.

The AM system consists of a Voltage Rectification and a Voltage Regulation block to produce a constant 1V supply from the 3.3Vpp AC power driven by the CM. The AM also recovers a 20MHz clock from the power signals which is used for the operation of the Digital Logic block as well as the charge pumps. Lastly, the AM contains power switches driven by signals from the Digital Logic block that is level-shifted to the voltages retrieved from the charge pump. These signals are used to drive analog power switches for each NM.

The ASIC implementation, excluding I/O cells, consumes 87.82μW, more than an order of magnitude lower than the current PCB prototype.

Advisors: Elad Alon

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BibTeX citation:

@mastersthesis{Mailoa:EECS-2016-77,
    Author= {Mailoa, Nathaniel},
    Title= {Design of the Aggregator Module ASIC for the Octopus-Mimetic Neural Implant (OMNI)},
    School= {EECS Department, University of California, Berkeley},
    Year= {2016},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-77.html},
    Number= {UCB/EECS-2016-77},
    Abstract= {The Aggregator Module (AM) is one of the 3 modules in the Octopus-Mimetic Neural Implant (OMNI) Brain-Machine Interface system. The AM is responsible for communication between the Control Module (CM) and the Neuromodulator Modules (NMs) as well as power distribution to the NMs. The current prototype of the AM is implemented in PCB and consumes 1.6mW. This project aims to move the design to an ASIC to reduce power consumption and area.

The AM system consists of a Voltage Rectification and a Voltage Regulation block to produce a constant 1V supply from the 3.3Vpp AC power driven by the CM. The AM also recovers a 20MHz clock from the power signals which is used for the operation of the Digital Logic block as well as the charge pumps. Lastly, the AM contains power switches driven by signals from the Digital Logic block that is level-shifted to the voltages retrieved from the charge pump. These signals are used to drive analog power switches for each NM.

The ASIC implementation, excluding I/O cells, consumes 87.82μW, more than an order of magnitude lower than the current PCB prototype.},
}

EndNote citation:

%0 Thesis
%A Mailoa, Nathaniel 
%T Design of the Aggregator Module ASIC for the Octopus-Mimetic Neural Implant (OMNI)
%I EECS Department, University of California, Berkeley
%D 2016
%8 May 13
%@ UCB/EECS-2016-77
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2016/EECS-2016-77.html
%F Mailoa:EECS-2016-77