Vladimir Stojanovic

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2019-7

April 22, 2019

Recent advancements in silicon photonics show great promise in meeting the high bandwidth and low energy demands of emerging applications. However, a key gating factor in ensuring this necessity is met is the utilization of a link design method- ology which transcends the various levels in the hierarchy, ranging from the device and platform level up to the systems level. In this dissertation, a comprehensive methodology for link design will be introduced which takes a two-prong approach to tackling the issue of silicon photonic link efficiency. Namely, a fundamentals-based first principles approach to link optimization will be introduced and validated. In addition, physical design trade-offs connecting levels in the architectural hierarchy will also be studied and explored. This culminates in an intermediate goal of this dissertation, which is the first-ever design and verification of a full silicon photonic interconnect on a 3D integrated electronic-photonic platform. To proceed and further enable the rapid exploration of the link design architectural space, the analog macros for a majority of this dissertation were auto-generated using the Berkeley Analog Gen- erator (BAG). With these key design tools and framework, performance bottlenecks and improvements for silicon photonic links will be analyzed and, from this analysis, the motivation for a new, single comparator-based PAM4 receiver architecture shall emerge. This architecture not only showcases the tight bond in dependency between high-level link specifications and low level device parameters, but also shows the im- portance of physical design constraints alongside fundamental theory in influencing end-to-end link performance.

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BibTeX citation:

@phdthesis{Stojanovic:EECS-2019-7,
    Author= {Stojanovic, Vladimir},
    Title= {Photonic Links -- From Theory to Automated Design},
    School= {EECS Department, University of California, Berkeley},
    Year= {2019},
    Month= {Apr},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS-2019-7.html},
    Number= {UCB/EECS-2019-7},
    Abstract= {Recent advancements in silicon photonics show great promise in meeting the high bandwidth and low energy demands of emerging applications. However, a key gating factor in ensuring this necessity is met is the utilization of a link design method- ology which transcends the various levels in the hierarchy, ranging from the device and platform level up to the systems level. In this dissertation, a comprehensive methodology for link design will be introduced which takes a two-prong approach to tackling the issue of silicon photonic link efficiency. Namely, a fundamentals-based first principles approach to link optimization will be introduced and validated. In addition, physical design trade-offs connecting levels in the architectural hierarchy will also be studied and explored. This culminates in an intermediate goal of this dissertation, which is the first-ever design and verification of a full silicon photonic interconnect on a 3D integrated electronic-photonic platform. To proceed and further enable the rapid exploration of the link design architectural space, the analog macros for a majority of this dissertation were auto-generated using the Berkeley Analog Gen- erator (BAG). With these key design tools and framework, performance bottlenecks and improvements for silicon photonic links will be analyzed and, from this analysis, the motivation for a new, single comparator-based PAM4 receiver architecture shall emerge. This architecture not only showcases the tight bond in dependency between high-level link specifications and low level device parameters, but also shows the im- portance of physical design constraints alongside fundamental theory in influencing end-to-end link performance.},
}

EndNote citation:

%0 Thesis
%A Stojanovic, Vladimir 
%T Photonic Links -- From Theory to Automated Design
%I EECS Department, University of California, Berkeley
%D 2019
%8 April 22
%@ UCB/EECS-2019-7
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2019/EECS-2019-7.html
%F Stojanovic:EECS-2019-7