Patrick Pannuto

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2020-208

December 17, 2020

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-208.pdf

Advancements across the computing stack now allow the realization of self-contained, sensing, computing, and communication devices in less than a cubic millimeter of volume—Smart Dust. Today’s millimeter-scale systems are often one-offs, however. They are built to prove they can be built or for one particular application, but they are not yet so numerous and diverse to satisfy the vision of ubiquitous, ambient intelligence. This work aims to identify and address challenges in the move from tens to tens of millions of Smart Dust computing systems.

The core contribution of this dissertation is bringing modularity to the millimeter-scale computing class. Much of the rich panoply of conventional systems is driven not by the diversity of individual chips alone but by the number of different ways in which they can be synthesized into novel designs. Composition-oriented design of systems is enabled in part by the interconnect technologies that lie between components. This dissertation identifies the limitations of extant interconnect technologies for the millimeter-scale computing class and then designs, implements, and evaluates a new interconnect bus and interconnect protocol that enables composable Smart Dust systems. As a final contribution, this dissertation shows how this same interconnect can be leveraged to support key operations for bringup and deployment of Smart Dust systems, in particular programming and debugging.

Advisors: Prabal Dutta

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BibTeX citation:

@phdthesis{Pannuto:EECS-2020-208,
    Author= {Pannuto, Patrick},
    Title= {The Design & Implementation of Modular Smart Dust},
    School= {EECS Department, University of California, Berkeley},
    Year= {2020},
    Month= {Dec},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-208.html},
    Number= {UCB/EECS-2020-208},
    Note= {This work was supported in part by the TerraSwarm Research Center, one of six
centers supported by the STARnet phase of the Focus Center Research Program
(FCRP), a Semiconductor Research Corporation program sponsored by MARCO and
DARPA. This work was supported in part by the CONIX Research Center, one of six centers in JUMP, a Semiconductor Research Corporation (SRC) program sponsored by DARPA. This research was conducted with Government support under and awarded by DoD,
Air Force Office of Scientific Research, National Defense Science and
Engineering Graduate (NDSEG) Fellowship, 32 CFR 168a. This material is based upon work partially supported by the National Science Foundation under grants CNS-0964120, CNS-1111541, and CNS-1350967, and generous gifts from Intel, Qualcomm, and Texas Instruments.},
    Abstract= {Advancements across the computing stack now allow the realization of self-contained, sensing, computing, and communication devices in less than a cubic millimeter of volume—Smart Dust. Today’s millimeter-scale systems are often one-offs, however. They are built to prove they can be built or for one particular application, but they are not yet so numerous and diverse to satisfy the vision of ubiquitous, ambient intelligence. This work aims to identify and address challenges in the move from tens to tens of millions of Smart Dust computing systems.

The core contribution of this dissertation is bringing modularity to the millimeter-scale computing class. Much of the rich panoply of conventional systems is driven not by the diversity of individual chips alone but by the number of different ways in which they can be synthesized into novel designs. Composition-oriented design of systems is enabled in part by the interconnect technologies that lie between components. This dissertation identifies the limitations of extant interconnect technologies for the millimeter-scale computing class and then designs, implements, and evaluates a new interconnect bus and interconnect protocol that enables composable Smart Dust systems. As a final contribution, this dissertation shows how this same interconnect can be leveraged to support key operations for bringup and deployment of Smart Dust systems, in particular programming and debugging.},
}

EndNote citation:

%0 Thesis
%A Pannuto, Patrick 
%T The Design & Implementation of Modular Smart Dust
%I EECS Department, University of California, Berkeley
%D 2020
%8 December 17
%@ UCB/EECS-2020-208
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2020/EECS-2020-208.html
%F Pannuto:EECS-2020-208