Wen Chuen Liu

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2021-25

May 1, 2021

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-25.pdf

High-performance power conversions are essential in many applications, especially in the fast-growing computing industries as well as the wireless sensor networks. A common example in mobile devices is the dc-dc converter that converts the energy from a 4 V Li-ion battery to 1 V CPU / GPU chips, where efficiency and form factor are of the most important concerns. Meanwhile, the source voltage increases with the processed power to reduce wire conduction loss, e.g. 48 V DC grid for data centers. In particular, a hybrid approach has shown great potential in achieving high efficiency, high power density, and high conversion ratio, due to its efficient passives and switch utilization compared to the conventional buck and switched capacitor (SC) converters.

In this work, the development of a hybrid or resonant SC (ReSC) converter, along with its soft-charging feature, is illustrated to address the fundamental limits of conventional SC converters and efficiently utilize the high energy density of capacitors. On top of that, various SC topologies are synthesized from a single unit cell for obtaining higher conversion ratios. While several optimization approaches for switch utilizations have been established in recent studies, they mainly focus on the ideal switch model but with the absence of practical considerations. Therefore, a more comprehensive design and comparison framework for commercially available switches and passive components with various voltage domains will be elaborated throughout this work, in conjunction with the analysis and experimental results. The proposed framework serves as a selection guideline for topologies, and it is further solidified through various power converters with optimized switch employment, i.e. an on-chip 4-to-1 V Dickson converter and an on-chip three-level boost converter implemented using the custom switch sizing and voltage rating in 65 nm CMOS process; a 48-to-4 V two-stage ReSC and a 4-to-1 bi-lateral energy resonant converter (BERC) built using ultra-low on-resistance discrete silicon switches.

Several on-chip and discrete hardware prototypes for hybrid SC converters have been implemented, measured, and showing promising performance in efficiency, power density, and conversion ratios compared to prior arts, which are suitable for applications ranging from point-of-load (PoL), data center power deliveries and energy harvesting. Meanwhile, the hybrid approach offers a lot more design freedom in optimizing the switches and passives utilization, providing more opportunities in further improvement and research topics for high-performance power converters.

Advisors: Robert Pilawa-Podgurski

---

BibTeX citation:

@phdthesis{Liu:EECS-2021-25,
    Author= {Liu, Wen Chuen},
    Title= {Hybrid Switched-Capacitor Converters for High-Performance Power Conversions},
    School= {EECS Department, University of California, Berkeley},
    Year= {2021},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-25.html},
    Number= {UCB/EECS-2021-25},
    Abstract= {High-performance power conversions are essential in many applications, especially in the fast-growing computing industries as well as the wireless sensor networks. A common example in mobile devices is the dc-dc converter that converts the energy from a 4 V Li-ion battery to 1 V CPU / GPU chips, where efficiency and form factor are of the most important concerns. Meanwhile, the source voltage increases with the processed power to reduce wire conduction loss, e.g. 48 V DC grid for data centers. In particular, a hybrid approach has shown great potential in achieving high efficiency, high power density, and high conversion ratio, due to its efficient passives and switch utilization compared to the conventional buck and switched capacitor (SC) converters.

In this work, the development of a hybrid or resonant SC (ReSC) converter, along with its soft-charging feature, is illustrated to address the fundamental limits of conventional SC converters and efficiently utilize the high energy density of capacitors. On top of that, various SC topologies are synthesized from a single unit cell for obtaining higher conversion ratios. While several optimization approaches for switch utilizations have been established in recent studies, they mainly focus on the ideal switch model but with the absence of practical considerations. Therefore, a more comprehensive design and comparison framework for commercially available switches and passive components with various voltage domains will be elaborated throughout this work, in conjunction with the analysis and experimental results. The proposed framework serves as a selection guideline for topologies, and it is further solidified through various power converters with optimized switch employment, i.e. an on-chip 4-to-1 V Dickson converter and an on-chip three-level boost converter implemented using the custom switch sizing and voltage rating in 65 nm CMOS process; a 48-to-4 V two-stage ReSC and a 4-to-1 bi-lateral energy resonant converter (BERC) built using ultra-low on-resistance discrete silicon switches. 

Several on-chip and discrete hardware prototypes for hybrid SC converters have been implemented, measured, and showing promising performance in efficiency, power density, and conversion ratios compared to prior arts, which are suitable for applications ranging from point-of-load (PoL), data center power deliveries and energy harvesting. Meanwhile, the hybrid approach offers a lot more design freedom in optimizing the switches and passives utilization, providing more opportunities in further improvement and research topics for high-performance power converters.},
}

EndNote citation:

%0 Thesis
%A Liu, Wen Chuen 
%T Hybrid Switched-Capacitor Converters for High-Performance Power Conversions
%I EECS Department, University of California, Berkeley
%D 2021
%8 May 1
%@ UCB/EECS-2021-25
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2021/EECS-2021-25.html
%F Liu:EECS-2021-25