Ava Tan

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2022-17

May 1, 2022

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2022/EECS-2022-17.pdf

As modern computing workloads become more and more data-centric, there has been an increasing need in recent years to develop memory solutions which can adequately provide the high performance, speed, and energy efficiencies required by data-intensive applications. Simultaneously, with the timely discovery of ferroelectricity in a well-investigated CMOS-compatible material – hafnium oxide, or HfO2 – memory devices integrating ferroelectrics have also made a resurgence on the nonvolatile memory landscape.

This work presents the ground-up development of a novel CMOS-compatible ferroelectric oxide, doped HfO2, and demonstrates its successful integration into ferroelectric memory capacitors (FeRAMs), transistors (FeFETs), and content addressable memory cells (FeCAMs). As HfO2-based memories are still a nascent technology, special emphasis is placed on developing a deeper physical understanding of the various engineering challenges associated with process integration and device performance. Underlying reliability concerns related to limited cycling endurance and premature device failure are identified, and methods to mitigate some of these bottlenecks are presented and investigated. Based upon the understanding derived from identifying the physical root causes for degradation, a highly effective gate oxide engineering technique for boosting the endurance metric of the FeFET by roughly 5 orders of magnitude, which enables the highest endurance numbers reported on FeFETs with a crystalline silicon channel to date, is demonstrated. Lastly, the successful fabrication and characterization of content addressable memory cells based on the FeFET is reported. The simple 2-FeFET FeCAM cell boasts both nonvolatility and substantially smaller on-chip footprint in contrast to its existing SRAM-based CMOS counterpart.

The overall objective of this work is to provide a pathway forward for continued development on a CMOS-compatible nonvolatile memory element that can be used for embedded memory applications or for in-memory computing. The operational properties of the doped HfO2-based FeFET, in considering its intrinsic fast write/read speeds, low voltage requirements, and retention robustness, makes it well-suited to accommodate demanding modern computational needs by sealing the gaps between conventional memory, logic, and continued device scaling.

Advisors: Sayeef Salahuddin

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BibTeX citation:

@phdthesis{Tan:EECS-2022-17,
    Author= {Tan, Ava},
    Editor= {Salahuddin, Sayeef and Hu, Chenming and Wu, Junqiao},
    Title= {Towards High-Endurance, Nonvolatile, CMOS-Compatible Ferroelectric Memories for Next-Generation Computing},
    School= {EECS Department, University of California, Berkeley},
    Year= {2022},
    Month= {May},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2022/EECS-2022-17.html},
    Number= {UCB/EECS-2022-17},
    Abstract= {As modern computing workloads become more and more data-centric, there has been an increasing need in recent years to develop memory solutions which can adequately provide the high performance, speed, and energy efficiencies required by data-intensive applications. Simultaneously, with the timely discovery of ferroelectricity in a well-investigated CMOS-compatible material – hafnium oxide, or HfO2 – memory devices integrating ferroelectrics have also made a resurgence on the nonvolatile memory landscape.

This work presents the ground-up development of a novel CMOS-compatible ferroelectric oxide, doped HfO2, and demonstrates its successful integration into ferroelectric memory capacitors (FeRAMs), transistors (FeFETs), and content addressable memory cells (FeCAMs). As HfO2-based memories are still a nascent technology, special emphasis is placed on developing a deeper physical understanding of the various engineering challenges associated with process integration and device performance. Underlying reliability concerns related to limited cycling endurance and premature device failure are identified, and methods to mitigate some of these bottlenecks are presented and investigated. Based upon the understanding derived from identifying the physical root causes for degradation, a highly effective gate oxide engineering technique for boosting the endurance metric of the FeFET by roughly 5 orders of magnitude, which enables the highest endurance numbers reported on FeFETs with a crystalline silicon channel to date, is demonstrated. Lastly, the successful fabrication and characterization of content addressable memory cells based on the FeFET is reported. The simple 2-FeFET FeCAM cell boasts both nonvolatility and substantially smaller on-chip footprint in contrast to its existing SRAM-based CMOS counterpart.

The overall objective of this work is to provide a pathway forward for continued development on a CMOS-compatible nonvolatile memory element that can be used for embedded memory applications or for in-memory computing. The operational properties of the 
doped HfO2-based FeFET, in considering its intrinsic fast write/read speeds, low voltage requirements, and retention robustness, makes it well-suited to accommodate demanding modern computational needs by sealing the gaps between conventional memory, logic, and continued device scaling.},
}

EndNote citation:

%0 Thesis
%A Tan, Ava 
%E Salahuddin, Sayeef 
%E Hu, Chenming 
%E Wu, Junqiao 
%T Towards High-Endurance, Nonvolatile, CMOS-Compatible Ferroelectric Memories for Next-Generation Computing
%I EECS Department, University of California, Berkeley
%D 2022
%8 May 1
%@ UCB/EECS-2022-17
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2022/EECS-2022-17.html
%F Tan:EECS-2022-17