Viansa Schmulbach

EECS Department, University of California, Berkeley

Technical Report No. UCB/EECS-2023-238

November 24, 2023

http://www2.eecs.berkeley.edu/Pubs/TechRpts/2023/EECS-2023-238.pdf

Hardware execution attacks exploit interactions in the processor microarchitecture. The goal of our research is to use formal verification tools to harden a processor implementation such that certain programs running on the processor are secure against transient execution attacks. In this paper, we formulate the task of hardening as a search problem for a minimal set of ordering constraints.

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BibTeX citation:

@techreport{Schmulbach:EECS-2023-238,
    Author= {Schmulbach, Viansa},
    Title= {Ordering Interventions for Hardware Security},
    Year= {2023},
    Month= {Nov},
    Url= {http://www2.eecs.berkeley.edu/Pubs/TechRpts/2023/EECS-2023-238.html},
    Number= {UCB/EECS-2023-238},
    Abstract= {Hardware execution attacks exploit interactions in the processor microarchitecture. The goal of our research is to use formal verification tools to harden a processor implementation such that certain programs running on the processor are secure against transient execution attacks. In this paper, we formulate the task of hardening as a search problem for a minimal set of ordering constraints.},
}

EndNote citation:

%0 Report
%A Schmulbach, Viansa 
%T Ordering Interventions for Hardware Security
%I EECS Department, University of California, Berkeley
%D 2023
%8 November 24
%@ UCB/EECS-2023-238
%U http://www2.eecs.berkeley.edu/Pubs/TechRpts/2023/EECS-2023-238.html
%F Schmulbach:EECS-2023-238