Aditya Varma

EECS Department, University of California, Berkeley

Technical Report No. UCB/

May 1, 2024

http://www2.eecs.berkeley.edu/Pubs/TechRpts/Hold/607b8322a9fd0dd6d9283d4a788a3196.pdf

Negative capacitance (NC) field effect transistors have received significant research interest in CMOS electronics for their ability to increase the intrinsic device capacitance and transconductance without degradation to carrier transport, while maintaining a high degree of CMOS compatibility due to the use of HfO2 and ZrO2 thin-film dielectrics. In this thesis, we expand upon two aspects of the current research on this emerging device technology. First, cryogenic RF and DC measurements are performed on p-type NCFETs on a silicon-on-insulator (SOI) platform. The maintenance of NC performance enhancements at 77 K in p-type devices is confirmed, along with substantial increases in gm, indicating the attractiveness of NCFETs for fully complimentary, low-temperature logic and mixed-signal circuit design. Furthermore, an in-depth analytical study of the RF noise performance of negative capacitance FETs is performed, in order to understand how the recovery of the cutoff frequency from parasitic capacitance suppression affects RF noise. We find favorable scaling trends in the minimum noise figure NFmin, noise measure NM, and noise sensitivity Rn when compared to the scaling performance of interfacially thinned dielectrics. Future work and applications of NCFETs in integrated circuit design are discussed in closing.

Advisors: Sayeef Salahuddin

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BibTeX citation:

@mastersthesis{Varma:31320,
    Author= {Varma, Aditya},
    Title= {Cryogenic and RF Performance of Negative Capacitance Field-Effect Transistors},
    School= {EECS Department, University of California, Berkeley},
    Year= {2024},
    Number= {UCB/},
    Abstract= {Negative capacitance (NC) field effect transistors have received significant research interest in CMOS electronics for their ability to increase the intrinsic device capacitance and transconductance without degradation to carrier transport, while maintaining a high degree of CMOS compatibility due to the use of HfO2 and ZrO2 thin-film dielectrics. In this thesis, we expand upon two aspects of the current research on this emerging device technology. First, cryogenic RF and DC measurements are performed on p-type NCFETs on a silicon-on-insulator (SOI) platform. The maintenance of NC performance enhancements at 77 K in p-type devices is confirmed, along with substantial increases in gm, indicating the attractiveness of NCFETs for fully complimentary, low-temperature logic and mixed-signal circuit design. Furthermore, an in-depth analytical study of the RF noise performance of negative capacitance FETs is performed, in order to understand how the recovery of the cutoff frequency from parasitic capacitance suppression affects RF noise. We find favorable scaling trends in the minimum noise figure NFmin, noise measure NM, and noise sensitivity Rn when compared to the scaling performance of interfacially thinned dielectrics. Future work and applications of NCFETs in integrated circuit design are discussed in closing.},
}

EndNote citation:

%0 Thesis
%A Varma, Aditya 
%T Cryogenic and RF Performance of Negative Capacitance Field-Effect Transistors
%I EECS Department, University of California, Berkeley
%D 2024
%8 May 1
%@ UCB/
%F Varma:31320