Yahia Ibrahim

EECS Department, University of California, Berkeley

Technical Report No. UCB/

December 1, 2025

Modern communication systems demand high-order modulation schemes to support ever-increasing data rates. These complex modulation formats, characterized by a high peak-to-average power ratio (PAPR), impose stringent linearity requirements on power amplifiers (PAs). To satisfy error vector magnitude (EVM) specifications, PAs must often operate at power levels well below saturation, which significantly degrades their average power-added efficiency (PAE). While Doherty PAs are widely recognized for improving efficiency under power back-off, their practical deployment remains challenging due to several inherent limitations. This talk presents a series of proposed PA architectures that address the key challenges of Doherty PAs and transmitter (TX) systems in wireless communication. First, a 26 GHz Doherty PA architecture incorporating novel PVT-insensitive power detectors for adaptive biasing is introduced, mitigating the issue of PVT sensitivity in Doherty operation. Second, a 90 GHz Sequential PA is demonstrated, achieving over 14% PAE at 6 dB power back-off—the highest reported efficiency among CMOS PAs in this frequency range. Third, a 40 GHz Load-Isolated Doherty PA architecture is proposed, delivering VSWR-resilient performance with a 1.5× efficiency improvement under mismatch while maintaining a compact area. Finally, a 40 GHz switchless transmit–receive front-end is presented, featuring 40% peak TX efficiency together with VSWR resilient performance.

Advisors: Ali Niknejad

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BibTeX citation:

@phdthesis{Ibrahim:31963,
    Author= {Ibrahim, Yahia},
    Title= {High Efficiency Power Amplifiers for mm-Wave Communication Systems},
    School= {EECS Department, University of California, Berkeley},
    Year= {2025},
    Month= {Oct},
    Number= {UCB/},
    Note= {This is the final version, earlier version withdrawn. This version include edits by Proquest team},
    Abstract= {Modern communication systems demand high-order modulation schemes to support ever-increasing data rates. These complex modulation formats, characterized by a high peak-to-average power ratio (PAPR), impose stringent linearity requirements on power amplifiers (PAs). To satisfy error vector magnitude (EVM) specifications, PAs must often operate at power levels well below saturation, which significantly degrades their average power-added efficiency (PAE). While Doherty PAs are widely recognized for improving efficiency under power back-off, their practical deployment remains challenging due to several inherent limitations.
This talk presents a series of proposed PA architectures that address the key challenges of Doherty PAs and transmitter (TX) systems in wireless communication. First, a 26 GHz Doherty PA architecture incorporating novel PVT-insensitive power detectors for adaptive biasing is introduced, mitigating the issue of PVT sensitivity in Doherty operation. Second, a 90 GHz Sequential PA is demonstrated, achieving over 14% PAE at 6 dB power back-off—the highest reported efficiency among CMOS PAs in this frequency range. Third, a 40 GHz Load-Isolated Doherty PA architecture is proposed, delivering VSWR-resilient performance with a 1.5× efficiency improvement under mismatch while maintaining a compact area. Finally, a 40 GHz switchless transmit–receive front-end is presented, featuring 40% peak TX efficiency together with VSWR resilient performance.},
}

EndNote citation:

%0 Thesis
%A Ibrahim, Yahia 
%T High Efficiency Power Amplifiers for mm-Wave Communication Systems
%I EECS Department, University of California, Berkeley
%D 2025
%8 December 1
%@ UCB/
%F Ibrahim:31963