Areas of Interest

• Computer Architecture and Engineering
• Integrated Circuits
• Security
• Hardware Security

Poster

Measuring the Security of Circuit Locking Techniques

Abstract

The outsourcing of integrated circuit fabrication to third party facilities has led to investigations into potential resulting threats. As a result, multiple design-for-trust techniques which mitigate these threats have been introduced. Logic locking inserts additional gates and states into a design such that the application of an incorrect key leads to corrupted outputs. Although many different techniques for logic locking have been introduced, there is no one method that can be used to characterize the security. This poster will discuss an ATPG based approach that can be used to characterize multiple types of locked circuits. This approach derives key values from locked circuits using ATPG, effectively telling a designer how strong their lock is. Experiments show this approach is effective at measuring the security of multiple lock types.

Bio

Danielle Duvalsaint is a fourth year PhD student at Carnegie Mellon University. Danielle received her bachelor’s degree from the University of Delaware where she worked on research investigating side-channel attacks on microprocessors. Currently, Danielle works in the area of hardware security with a focus on characterizing obfuscation techniques. At CMU, Danielle has published two first author papers and has been named a 2020 Cylab presidential fellow.