We show for the first time in detail how the cache replacement states, e.g., the states associated with the Least Recently Used (LRU) cache replacement policy in caches, can be used as timing-based side and covert channels for high bandwidth information leaks in commercial processors. Further, the LRU channels are shown to pose threats to existing secure cache designs by demonstrating how the LRU channels break the security of the secure Partition-Locked (PL) cache in the gem5 simulator.
The poster also presents a runtime accessible decay-based DRAM Physically Unclonable Functions (PUFs). A PUF leverages the unique and stable physical features of a piece of hardware, which emerge due to variations in the fabrication processes, to create the so-called challenge-response pairs (CRPs) that are unique but stable to each piece of hardware. This research demonstrated the first runtime accessible DRAM PUFs in commercial off-the-shelf systems, which requires no additional hardware. One of the key advantages of our PUF construction is that it can be queried during runtime of a Linux system. The runtime accessible DRAM PUFs are further proposed for use in different security applications, including device authentication, key storage, secure channel establishment, and dynamic software protection. [an error occurred while processing this directive] Wenjie Xiong is currently a postdoctoral researcher at Facebook AI Research (FAIR). She received her Ph.D. degree in the Department of Electrical Engineering at Yale University in May 2020, advised by Prof. Jakub Szefer. She is broadly interested in hardware security, especially in designing new security primitives in hardware and side-channel attacks. She has recently worked on designs of new Physically Unclonable Functions (PUFs), designs of schemes leveraging physical properties of hardware for new cryptographic and security applications, security verification of processor architectures, and analysis of attacks and mitigations of timing channels in caches and TLBs. [an error occurred while processing this directive] Personal home page [an error occurred while processing this directive] [an error occurred while processing this directive]